From: Alexey Kardashevskiy <aik@ozlabs.ru>
To: David Gibson <david@gibson.dropbear.id.au>, benh@kernel.crashing.org
Cc: agraf@suse.de, qemu-devel@nongnu.org, gwshan@au1.ibm.com,
mdroth@linux.vnet.ibm.com, alex.williamson@redhat.com,
qemu-ppc@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 03/12] spapr_pci: Eliminate class callbacks
Date: Mon, 29 Feb 2016 12:43:20 +1100 [thread overview]
Message-ID: <56D3A238.2000806@ozlabs.ru> (raw)
In-Reply-To: <1456486323-8047-4-git-send-email-david@gibson.dropbear.id.au>
On 02/26/2016 10:31 PM, David Gibson wrote:
> The EEH operations in the spapr-vfio-pci-host-bridge no longer rely on the
> special groupid field in sPAPRPHBVFIOState. So we can simplify, removing
> the class specific callbacks with direct calls based on a simple
> spapr_phb_eeh_enabled() helper. For now we implement that in terms of
> a boolean in the class, but we'll continue to clean that up later.
>
> On its own this is a rather strange way of doing things, but it's a useful
> intermediate step to further cleanups.
Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
>
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> ---
> hw/ppc/spapr_pci.c | 44 ++++++++++++++++++++++----------------------
> hw/ppc/spapr_pci_vfio.c | 18 +++++++-----------
> include/hw/pci-host/spapr.h | 13 +++++++++----
> 3 files changed, 38 insertions(+), 37 deletions(-)
>
> diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
> index 9b2b546..d1e5222 100644
> --- a/hw/ppc/spapr_pci.c
> +++ b/hw/ppc/spapr_pci.c
> @@ -92,6 +92,13 @@ PCIDevice *spapr_pci_find_dev(sPAPRMachineState *spapr, uint64_t buid,
> return pci_find_device(phb->bus, bus_num, devfn);
> }
>
> +static bool spapr_phb_eeh_available(sPAPRPHBState *sphb)
> +{
> + sPAPRPHBClass *spc = SPAPR_PCI_HOST_BRIDGE_GET_CLASS(sphb);
> +
> + return spc->eeh_available;
> +}
> +
> static uint32_t rtas_pci_cfgaddr(uint32_t arg)
> {
> /* This handles the encoding of extended config space addresses */
> @@ -438,7 +445,6 @@ static void rtas_ibm_set_eeh_option(PowerPCCPU *cpu,
> target_ulong rets)
> {
> sPAPRPHBState *sphb;
> - sPAPRPHBClass *spc;
> uint32_t addr, option;
> uint64_t buid;
> int ret;
> @@ -456,12 +462,11 @@ static void rtas_ibm_set_eeh_option(PowerPCCPU *cpu,
> goto param_error_exit;
> }
>
> - spc = SPAPR_PCI_HOST_BRIDGE_GET_CLASS(sphb);
> - if (!spc->eeh_set_option) {
> + if (!spapr_phb_eeh_available(sphb)) {
> goto param_error_exit;
> }
>
> - ret = spc->eeh_set_option(sphb, addr, option);
> + ret = spapr_phb_vfio_eeh_set_option(sphb, addr, option);
> rtas_st(rets, 0, ret);
> return;
>
> @@ -476,7 +481,6 @@ static void rtas_ibm_get_config_addr_info2(PowerPCCPU *cpu,
> target_ulong rets)
> {
> sPAPRPHBState *sphb;
> - sPAPRPHBClass *spc;
> PCIDevice *pdev;
> uint32_t addr, option;
> uint64_t buid;
> @@ -491,8 +495,7 @@ static void rtas_ibm_get_config_addr_info2(PowerPCCPU *cpu,
> goto param_error_exit;
> }
>
> - spc = SPAPR_PCI_HOST_BRIDGE_GET_CLASS(sphb);
> - if (!spc->eeh_set_option) {
> + if (!spapr_phb_eeh_available(sphb)) {
> goto param_error_exit;
> }
>
> @@ -532,7 +535,6 @@ static void rtas_ibm_read_slot_reset_state2(PowerPCCPU *cpu,
> target_ulong rets)
> {
> sPAPRPHBState *sphb;
> - sPAPRPHBClass *spc;
> uint64_t buid;
> int state, ret;
>
> @@ -546,12 +548,11 @@ static void rtas_ibm_read_slot_reset_state2(PowerPCCPU *cpu,
> goto param_error_exit;
> }
>
> - spc = SPAPR_PCI_HOST_BRIDGE_GET_CLASS(sphb);
> - if (!spc->eeh_get_state) {
> + if (!spapr_phb_eeh_available(sphb)) {
> goto param_error_exit;
> }
>
> - ret = spc->eeh_get_state(sphb, &state);
> + ret = spapr_phb_vfio_eeh_get_state(sphb, &state);
> rtas_st(rets, 0, ret);
> if (ret != RTAS_OUT_SUCCESS) {
> return;
> @@ -576,7 +577,6 @@ static void rtas_ibm_set_slot_reset(PowerPCCPU *cpu,
> target_ulong rets)
> {
> sPAPRPHBState *sphb;
> - sPAPRPHBClass *spc;
> uint32_t option;
> uint64_t buid;
> int ret;
> @@ -592,12 +592,11 @@ static void rtas_ibm_set_slot_reset(PowerPCCPU *cpu,
> goto param_error_exit;
> }
>
> - spc = SPAPR_PCI_HOST_BRIDGE_GET_CLASS(sphb);
> - if (!spc->eeh_reset) {
> + if (!spapr_phb_eeh_available(sphb)) {
> goto param_error_exit;
> }
>
> - ret = spc->eeh_reset(sphb, option);
> + ret = spapr_phb_vfio_eeh_reset(sphb, option);
> rtas_st(rets, 0, ret);
> return;
>
> @@ -612,7 +611,6 @@ static void rtas_ibm_configure_pe(PowerPCCPU *cpu,
> target_ulong rets)
> {
> sPAPRPHBState *sphb;
> - sPAPRPHBClass *spc;
> uint64_t buid;
> int ret;
>
> @@ -626,12 +624,11 @@ static void rtas_ibm_configure_pe(PowerPCCPU *cpu,
> goto param_error_exit;
> }
>
> - spc = SPAPR_PCI_HOST_BRIDGE_GET_CLASS(sphb);
> - if (!spc->eeh_configure) {
> + if (!spapr_phb_eeh_available(sphb)) {
> goto param_error_exit;
> }
>
> - ret = spc->eeh_configure(sphb);
> + ret = spapr_phb_vfio_eeh_configure(sphb);
> rtas_st(rets, 0, ret);
> return;
>
> @@ -647,7 +644,6 @@ static void rtas_ibm_slot_error_detail(PowerPCCPU *cpu,
> target_ulong rets)
> {
> sPAPRPHBState *sphb;
> - sPAPRPHBClass *spc;
> int option;
> uint64_t buid;
>
> @@ -661,8 +657,7 @@ static void rtas_ibm_slot_error_detail(PowerPCCPU *cpu,
> goto param_error_exit;
> }
>
> - spc = SPAPR_PCI_HOST_BRIDGE_GET_CLASS(sphb);
> - if (!spc->eeh_set_option) {
> + if (!spapr_phb_eeh_available(sphb)) {
> goto param_error_exit;
> }
>
> @@ -1430,6 +1425,10 @@ static void spapr_phb_reset(DeviceState *qdev)
> {
> /* Reset the IOMMU state */
> object_child_foreach(OBJECT(qdev), spapr_phb_children_reset, NULL);
> +
> + if (spapr_phb_eeh_available(SPAPR_PCI_HOST_BRIDGE(qdev))) {
> + spapr_phb_vfio_reset(qdev);
> + }
> }
>
> static Property spapr_phb_properties[] = {
> @@ -1560,6 +1559,7 @@ static void spapr_phb_class_init(ObjectClass *klass, void *data)
> set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
> dc->cannot_instantiate_with_device_add_yet = false;
> spc->finish_realize = spapr_phb_finish_realize;
> + spc->eeh_available = false;
> hp->plug = spapr_phb_hot_plug_child;
> hp->unplug = spapr_phb_hot_unplug_child;
> }
> diff --git a/hw/ppc/spapr_pci_vfio.c b/hw/ppc/spapr_pci_vfio.c
> index b1e8e8e..10fa88a 100644
> --- a/hw/ppc/spapr_pci_vfio.c
> +++ b/hw/ppc/spapr_pci_vfio.c
> @@ -78,7 +78,7 @@ static void spapr_phb_vfio_eeh_reenable(sPAPRPHBState *sphb)
> vfio_eeh_as_op(&sphb->iommu_as, VFIO_EEH_PE_ENABLE);
> }
>
> -static void spapr_phb_vfio_reset(DeviceState *qdev)
> +void spapr_phb_vfio_reset(DeviceState *qdev)
> {
> /*
> * The PE might be in frozen state. To reenable the EEH
> @@ -89,8 +89,8 @@ static void spapr_phb_vfio_reset(DeviceState *qdev)
> spapr_phb_vfio_eeh_reenable(SPAPR_PCI_HOST_BRIDGE(qdev));
> }
>
> -static int spapr_phb_vfio_eeh_set_option(sPAPRPHBState *sphb,
> - unsigned int addr, int option)
> +int spapr_phb_vfio_eeh_set_option(sPAPRPHBState *sphb,
> + unsigned int addr, int option)
> {
> uint32_t op;
> int ret;
> @@ -136,7 +136,7 @@ static int spapr_phb_vfio_eeh_set_option(sPAPRPHBState *sphb,
> return RTAS_OUT_SUCCESS;
> }
>
> -static int spapr_phb_vfio_eeh_get_state(sPAPRPHBState *sphb, int *state)
> +int spapr_phb_vfio_eeh_get_state(sPAPRPHBState *sphb, int *state)
> {
> int ret;
>
> @@ -192,7 +192,7 @@ static void spapr_phb_vfio_eeh_pre_reset(sPAPRPHBState *sphb)
> pci_for_each_bus(phb->bus, spapr_phb_vfio_eeh_clear_bus_msix, NULL);
> }
>
> -static int spapr_phb_vfio_eeh_reset(sPAPRPHBState *sphb, int option)
> +int spapr_phb_vfio_eeh_reset(sPAPRPHBState *sphb, int option)
> {
> uint32_t op;
> int ret;
> @@ -221,7 +221,7 @@ static int spapr_phb_vfio_eeh_reset(sPAPRPHBState *sphb, int option)
> return RTAS_OUT_SUCCESS;
> }
>
> -static int spapr_phb_vfio_eeh_configure(sPAPRPHBState *sphb)
> +int spapr_phb_vfio_eeh_configure(sPAPRPHBState *sphb)
> {
> int ret;
>
> @@ -239,12 +239,8 @@ static void spapr_phb_vfio_class_init(ObjectClass *klass, void *data)
> sPAPRPHBClass *spc = SPAPR_PCI_HOST_BRIDGE_CLASS(klass);
>
> dc->props = spapr_phb_vfio_properties;
> - dc->reset = spapr_phb_vfio_reset;
> spc->finish_realize = spapr_phb_vfio_finish_realize;
> - spc->eeh_set_option = spapr_phb_vfio_eeh_set_option;
> - spc->eeh_get_state = spapr_phb_vfio_eeh_get_state;
> - spc->eeh_reset = spapr_phb_vfio_eeh_reset;
> - spc->eeh_configure = spapr_phb_vfio_eeh_configure;
> + spc->eeh_available = true;
> }
>
> static const TypeInfo spapr_phb_vfio_info = {
> diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h
> index 7de5e02..cc1b82c 100644
> --- a/include/hw/pci-host/spapr.h
> +++ b/include/hw/pci-host/spapr.h
> @@ -49,10 +49,7 @@ struct sPAPRPHBClass {
> PCIHostBridgeClass parent_class;
>
> void (*finish_realize)(sPAPRPHBState *sphb, Error **errp);
> - int (*eeh_set_option)(sPAPRPHBState *sphb, unsigned int addr, int option);
> - int (*eeh_get_state)(sPAPRPHBState *sphb, int *state);
> - int (*eeh_reset)(sPAPRPHBState *sphb, int option);
> - int (*eeh_configure)(sPAPRPHBState *sphb);
> + bool eeh_available;
> };
>
> typedef struct spapr_pci_msi {
> @@ -136,5 +133,13 @@ void spapr_pci_rtas_init(void);
> sPAPRPHBState *spapr_pci_find_phb(sPAPRMachineState *spapr, uint64_t buid);
> PCIDevice *spapr_pci_find_dev(sPAPRMachineState *spapr, uint64_t buid,
> uint32_t config_addr);
> +void spapr_phb_vfio_reset(DeviceState *qdev);
> +
> +/* VFIO EEH hooks */
> +int spapr_phb_vfio_eeh_set_option(sPAPRPHBState *sphb,
> + unsigned int addr, int option);
> +int spapr_phb_vfio_eeh_get_state(sPAPRPHBState *sphb, int *state);
> +int spapr_phb_vfio_eeh_reset(sPAPRPHBState *sphb, int option);
> +int spapr_phb_vfio_eeh_configure(sPAPRPHBState *sphb);
>
> #endif /* __HW_SPAPR_PCI_H__ */
>
--
Alexey
next prev parent reply other threads:[~2016-02-29 1:43 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-26 11:31 [Qemu-devel] [PATCH 00/12] Allow EEH on spapr-pci-host-bridge devices David Gibson
2016-02-26 11:31 ` [Qemu-devel] [PATCH 01/12] vfio: Start improving VFIO/EEH interface David Gibson
2016-02-29 0:58 ` Alexey Kardashevskiy
2016-02-29 3:13 ` David Gibson
2016-02-26 11:31 ` [Qemu-devel] [PATCH 02/12] spapr_pci: Switch to vfio_eeh_as_op() interface David Gibson
2016-02-29 1:43 ` Alexey Kardashevskiy
2016-02-29 3:00 ` David Gibson
2016-02-26 11:31 ` [Qemu-devel] [PATCH 03/12] spapr_pci: Eliminate class callbacks David Gibson
2016-02-29 1:43 ` Alexey Kardashevskiy [this message]
2016-02-29 3:42 ` Alexey Kardashevskiy
2016-02-26 11:31 ` [Qemu-devel] [PATCH 04/12] spapr_pci: Fold spapr_phb_vfio_eeh_configure() into spapr_pci code David Gibson
2016-02-29 1:43 ` Alexey Kardashevskiy
2016-02-29 3:45 ` Alexey Kardashevskiy
2016-02-29 4:25 ` Alexey Kardashevskiy
2016-02-29 6:20 ` David Gibson
2016-02-26 11:31 ` [Qemu-devel] [PATCH 05/12] spapr_pci: Fold spapr_phb_vfio_eeh_reset() " David Gibson
2016-02-29 1:43 ` Alexey Kardashevskiy
2016-02-26 11:31 ` [Qemu-devel] [PATCH 06/12] spapr_pci: Fold spapr_phb_vfio_eeh_get_state() " David Gibson
2016-02-29 1:43 ` Alexey Kardashevskiy
2016-02-26 11:31 ` [Qemu-devel] [PATCH 07/12] spapr_pci: Fold spapr_phb_vfio_eeh_set_option() " David Gibson
2016-02-29 1:44 ` Alexey Kardashevskiy
2016-02-26 11:31 ` [Qemu-devel] [PATCH 08/12] spapr_pci: Fold spapr_phb_vfio_reset() " David Gibson
2016-02-29 1:44 ` Alexey Kardashevskiy
2016-02-26 11:32 ` [Qemu-devel] [PATCH 09/12] spapr_pci: Allow EEH on spapr-pci-host-bridge David Gibson
2016-02-29 1:44 ` Alexey Kardashevskiy
2016-02-26 11:32 ` [Qemu-devel] [PATCH 10/12] spapr_pci: (Mostly) remove spapr-pci-vfio-host-bridge David Gibson
2016-02-29 1:42 ` Alexey Kardashevskiy
2016-02-29 3:06 ` David Gibson
2016-02-26 11:32 ` [Qemu-devel] [PATCH 11/12] spapr_pci: Remove finish_realize hook David Gibson
2016-02-29 1:44 ` Alexey Kardashevskiy
2016-02-26 11:32 ` [Qemu-devel] [PATCH 12/12] vfio: Eliminate vfio_container_ioctl() David Gibson
2016-02-29 1:44 ` Alexey Kardashevskiy
2016-02-26 11:33 ` [Qemu-devel] [PATCH 00/12] Allow EEH on spapr-pci-host-bridge devices David Gibson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=56D3A238.2000806@ozlabs.ru \
--to=aik@ozlabs.ru \
--cc=agraf@suse.de \
--cc=alex.williamson@redhat.com \
--cc=benh@kernel.crashing.org \
--cc=david@gibson.dropbear.id.au \
--cc=gwshan@au1.ibm.com \
--cc=mdroth@linux.vnet.ibm.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).