From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54371) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aanFk-0001dK-MT for qemu-devel@nongnu.org; Tue, 01 Mar 2016 11:34:29 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aanFe-0000ZG-N2 for qemu-devel@nongnu.org; Tue, 01 Mar 2016 11:34:28 -0500 Received: from mail-qg0-x236.google.com ([2607:f8b0:400d:c04::236]:34216) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aanFe-0000Z4-IG for qemu-devel@nongnu.org; Tue, 01 Mar 2016 11:34:22 -0500 Received: by mail-qg0-x236.google.com with SMTP id b67so146194709qgb.1 for ; Tue, 01 Mar 2016 08:34:20 -0800 (PST) Sender: Richard Henderson References: <1456845134-18812-1-git-send-email-pbonzini@redhat.com> From: Richard Henderson Message-ID: <56D5C489.3060201@twiddle.net> Date: Tue, 1 Mar 2016 08:34:17 -0800 MIME-Version: 1.0 In-Reply-To: <1456845134-18812-1-git-send-email-pbonzini@redhat.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Subject: Re: [Qemu-devel] [PATCH] target-i386: fix smsw and lmsw from/to register List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paolo Bonzini , qemu-devel@nongnu.org Cc: hpoussin@reactos.org On 03/01/2016 07:12 AM, Paolo Bonzini wrote: > SMSW and LMSW accept register operands, but commit 1906b2a ("target-i386: > Rearrange processing of 0F 01", 2016-02-13) did not account for that. > > Fixes: 1906b2af7c2345037d9b2fdf484b457b5acd09d1 > Cc: rth@twiddle.net > Reported-by: Hervé Poussineau > Signed-off-by: Paolo Bonzini > --- > target-i386/translate.c | 38 ++++++++++++++++++++++---------------- > 1 file changed, 22 insertions(+), 16 deletions(-) Reviewed-by: Richard Henderson Sorry about that. As recompense, I just noticed that we're not implementing these instructions properly for 64-bit mode. I'll post a patch for that as well. r~