From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49987) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aao7l-0002m9-QF for qemu-devel@nongnu.org; Tue, 01 Mar 2016 12:30:18 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aao7g-0003gy-HV for qemu-devel@nongnu.org; Tue, 01 Mar 2016 12:30:17 -0500 Received: from mx1.redhat.com ([209.132.183.28]:56475) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aao7g-0003gr-C7 for qemu-devel@nongnu.org; Tue, 01 Mar 2016 12:30:12 -0500 References: <1456771254-17511-1-git-send-email-armbru@redhat.com> <1456771254-17511-19-git-send-email-armbru@redhat.com> From: Paolo Bonzini Message-ID: <56D5D19D.7030609@redhat.com> Date: Tue, 1 Mar 2016 18:30:05 +0100 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH 18/38] ivshmem: Leave INTx alone when using MSI-X List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: =?UTF-8?Q?Marc-Andr=c3=a9_Lureau?= , Markus Armbruster Cc: cam , Claudio Fontana , QEMU , David Marchand On 01/03/2016 18:14, Marc-Andr=C3=A9 Lureau wrote: > > + /* > > + * Note: we don't use INTx with IVSHMEM_MSI at all, so this is a > > + * bald-faced lie then. But it's a backwards compatible lie. > > + */ > > pci_config_set_interrupt_pin(pci_conf, 1); >=20 > I am not sure how much of a problem this is. Apparently, other devices > claim interrupt and msi (ich, hda, pvscsi) >=20 > Better ask someone more familiar with PCI details. The interrupt pin is read-only and just helps the OS figure out which interrupt is routed to intx. If you return early from ivshmem_update_irq if IVSHMEM_MSI, you should skip this line too. I think it's better to leave this line in and check if (msix_enabled(pci_dev)) { return; } in ivshmem_update_irq instead. This matches what xhci does, for example. Paolo