From: Richard Henderson <rth@twiddle.net>
To: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>,
qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 1/7] target-tricore: Add FPU infrastructure
Date: Tue, 1 Mar 2016 09:46:07 -0800 [thread overview]
Message-ID: <56D5D55F.3000406@twiddle.net> (raw)
In-Reply-To: <1456849468-30217-2-git-send-email-kbastian@mail.uni-paderborn.de>
On 03/01/2016 08:24 AM, Bastian Koppelmann wrote:
> +static inline void f_update_psw_flags(CPUTriCoreState *env, bool calc_z)
You probably need it for compiling this intermediate patch, but probably drop
inline and let the compiler choose. This is quite a bit of code after all...
> +{
> + int8_t flags = env->fp_status.float_exception_flags;
> + int32_t some_excp = 0;
You need to set float_exception_flags to zero after reading, so that you don't
re-copy the flags during the next fp insn.
> +#define FPU_FS PSW_USB_C
> +#define FPU_FI PSW_USB_V
> +#define FPU_FV PSW_USB_SV
> +#define FPU_FZ PSW_USB_AV
> +#define FPU_FU PSW_USB_SAV
What an unfortunate spec. This is an incredibly broken way to implement fp
exception flags.
Exception flags are the sort of thing that's supposed to be collected across a
whole subroutine, without having to worry about the fp exception flags being
clobbered by the surrounding pointer arithmetic.
In order to implement proper IEEE support with this chip, one would have to
implement the fp exception word in software, clearing the PSW bits before each
group of fp instructions and storing the PSW bits after each such group.
Oh well. You're doing what the manual says...
r~
next prev parent reply other threads:[~2016-03-01 17:47 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-01 16:24 [Qemu-devel] [PATCH 0/7] TriCore FPU patches Bastian Koppelmann
2016-03-01 16:24 ` [Qemu-devel] [PATCH 1/7] target-tricore: Add FPU infrastructure Bastian Koppelmann
2016-03-01 17:46 ` Richard Henderson [this message]
2016-03-01 16:24 ` [Qemu-devel] [PATCH 2/7] target-tricore: Move general CHECK_REG_PAIR of decode_rrr_divide Bastian Koppelmann
2016-03-01 17:46 ` Richard Henderson
2016-03-01 16:24 ` [Qemu-devel] [PATCH 3/7] target-tricore: add add.f/sub.f instructions Bastian Koppelmann
2016-03-01 18:10 ` Richard Henderson
2016-03-01 16:24 ` [Qemu-devel] [PATCH 4/7] target-tricore: Add mul.f instruction Bastian Koppelmann
2016-03-01 16:24 ` [Qemu-devel] [PATCH 5/7] target-tricore: Add div.f instruction Bastian Koppelmann
2016-03-01 16:24 ` [Qemu-devel] [PATCH 6/7] target-tricore: Add cmp.f instruction Bastian Koppelmann
2016-03-01 18:21 ` Richard Henderson
2016-03-08 10:20 ` Bastian Koppelmann
2016-03-08 14:42 ` Richard Henderson
2016-03-08 15:07 ` Bastian Koppelmann
2016-03-08 15:11 ` Bastian Koppelmann
2016-03-08 15:37 ` Richard Henderson
2016-03-08 15:40 ` Bastian Koppelmann
2016-03-01 16:24 ` [Qemu-devel] [PATCH 7/7] target-tricore: Add ftoi and itof instructions Bastian Koppelmann
2016-03-01 18:26 ` Richard Henderson
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