Re: [Qemu-devel] [PATCH] target-arm: Fix translation level on early translation faults

[Sergey Fedorov <serge.fdrv@gmail.com>]

On 02.03.2016 21:04, Sergey Sorokin wrote:
> Qemu reports translation fault on 1st level instead of 0th level in case of
> AArch64 address translation if the translation table walk is disabled or
> the address is in the gap between the two regions.

It's probably not a very clear description in the commit message. IIUC,
level 0 fault is reported in case of any fault from TTBR in AArch64 state.

Best regards,
Sergey

>
> Signed-off-by: Sergey Sorokin <afarallax@yandex.ru>
> ---
>  target-arm/helper.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/target-arm/helper.c b/target-arm/helper.c
> index 18c8296..09f920c 100644
> --- a/target-arm/helper.c
> +++ b/target-arm/helper.c
> @@ -7238,6 +7238,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
>       * support for those page table walks.
>       */
>      if (arm_el_is_aa64(env, el)) {
> +        level = 0;
>          va_size = 64;
>          if (el > 1) {
>              if (mmu_idx != ARMMMUIdx_S2NS) {