From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39034) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1abDkU-0006VZ-8l for qemu-devel@nongnu.org; Wed, 02 Mar 2016 15:51:59 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1abDkQ-0005ra-OT for qemu-devel@nongnu.org; Wed, 02 Mar 2016 15:51:58 -0500 Received: from mail-wm0-x244.google.com ([2a00:1450:400c:c09::244]:33374) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1abDkQ-0005rW-Hb for qemu-devel@nongnu.org; Wed, 02 Mar 2016 15:51:54 -0500 Received: by mail-wm0-x244.google.com with SMTP id n186so754797wmn.0 for ; Wed, 02 Mar 2016 12:51:54 -0800 (PST) References: <1456078260-6669-1-git-send-email-davidkiarie4@gmail.com> <1456078260-6669-3-git-send-email-davidkiarie4@gmail.com> <56CA1975.1020609@web.de> From: David Kiarie Message-ID: <56D75263.5060404@gmail.com> Date: Wed, 2 Mar 2016 23:51:47 +0300 MIME-Version: 1.0 In-Reply-To: <56CA1975.1020609@web.de> Content-Type: text/plain; charset=iso-8859-15; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [V6 2/4] hw/core: Add AMD IOMMU to machine properties List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Jan Kiszka , qemu-devel@nongnu.org Cc: marcel@redhat.com, valentine.sinitsyn@gmail.com, mst@redhat.com On 21/02/16 23:09, Jan Kiszka wrote: > On 2016-02-21 19:10, David Kiarie wrote: >> diff --git a/qemu-options.hx b/qemu-options.hx >> index 2f0465e..dad160f 100644 >> --- a/qemu-options.hx >> +++ b/qemu-options.hx >> @@ -38,7 +38,7 @@ DEF("machine", HAS_ARG, QEMU_OPTION_machine, \ >> " kvm_shadow_mem=size of KVM shadow MMU\n" >> " dump-guest-core=on|off include guest memory in a core dump (default=on)\n" >> " mem-merge=on|off controls memory merge support (default: on)\n" >> - " iommu=on|off controls emulated Intel IOMMU (VT-d) support (default=off)\n" >> + " iommu=amd|intel enables and selects the emulated IOMMU (default: off)\n" > We should also support "iommu=off" or "none" to explicitly disable it. > That is consistent with other switches, and maybe there will once be a > machine type (chipset) with IOMMU enabled by default. We could have such but this will not be referenced anywhere in the code as the IOMMU is 'off' by default. Most of the other such switches relate to properties that are 'on' by default. > > Jan >