From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48217) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1abERl-0003Cj-Ss for qemu-devel@nongnu.org; Wed, 02 Mar 2016 16:36:42 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1abERl-00084e-07 for qemu-devel@nongnu.org; Wed, 02 Mar 2016 16:36:41 -0500 References: <1456941872-8791-1-git-send-email-afarallax@yandex.ru> From: Sergey Fedorov Message-ID: <56D75CE1.4000608@gmail.com> Date: Thu, 3 Mar 2016 00:36:33 +0300 MIME-Version: 1.0 In-Reply-To: <1456941872-8791-1-git-send-email-afarallax@yandex.ru> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] target-arm: Fix translation level on early translation faults List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Sergey Sorokin , qemu-devel@nongnu.org Cc: Peter Maydell , qemu-arm@nongnu.org On 02.03.2016 21:04, Sergey Sorokin wrote: > Qemu reports translation fault on 1st level instead of 0th level in case of > AArch64 address translation if the translation table walk is disabled or > the address is in the gap between the two regions. > > Signed-off-by: Sergey Sorokin > --- > target-arm/helper.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/target-arm/helper.c b/target-arm/helper.c > index 18c8296..09f920c 100644 > --- a/target-arm/helper.c > +++ b/target-arm/helper.c > @@ -7238,6 +7238,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, > * support for those page table walks. > */ > if (arm_el_is_aa64(env, el)) { > + level = 0; > va_size = 64; > if (el > 1) { > if (mmu_idx != ARMMMUIdx_S2NS) { I think we'd better set the level variable to 1 for AArch32 in the else clause explicitly and drop its initialization in the beginning of the function. Otherwise it looks like AArch64 is a kind of special case. Best regards, Sergey