From: Thomas Huth <thuth@redhat.com>
To: "Cédric Le Goater" <clg@fr.ibm.com>,
"David Gibson" <david@gibson.dropbear.id.au>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 10/17] ppc: Add dummy SPR_IC for POWER8
Date: Mon, 14 Mar 2016 20:40:46 +0100 [thread overview]
Message-ID: <56E713BE.10106@redhat.com> (raw)
In-Reply-To: <1457974600-13828-11-git-send-email-clg@fr.ibm.com>
On 14.03.2016 17:56, Cédric Le Goater wrote:
> From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
>
> It's supposed to be an instruction counter. For now make us not
> crash when accessing it.
>
> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> ---
> target-ppc/cpu.h | 1 +
> target-ppc/translate_init.c | 12 ++++++++++++
> 2 files changed, 13 insertions(+)
>
> diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
> index 779cb57bd700..6952d789e518 100644
> --- a/target-ppc/cpu.h
> +++ b/target-ppc/cpu.h
> @@ -1691,6 +1691,7 @@ static inline int cpu_mmu_index (CPUPPCState *env, bool ifetch)
> #define SPR_MPC_MD_DBRAM1 (0x32A)
> #define SPR_RCPU_L2U_RA3 (0x32B)
> #define SPR_TAR (0x32F)
> +#define SPR_IC (0x350)
> #define SPR_VTB (0x351)
> #define SPR_MMCRC (0x353)
> #define SPR_440_INV0 (0x370)
> diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
> index 10f67136b609..68abd847a251 100644
> --- a/target-ppc/translate_init.c
> +++ b/target-ppc/translate_init.c
> @@ -8061,6 +8061,17 @@ static void gen_spr_power8_dbell(CPUPPCState *env)
> #endif
> }
>
> +static void gen_spr_power8_ic(CPUPPCState *env)
> +{
> +#if !defined(CONFIG_USER_ONLY)
> + spr_register_hv(env, SPR_IC, "IC",
> + SPR_NOACCESS, SPR_NOACCESS,
> + &spr_read_generic, SPR_NOACCESS,
> + &spr_read_generic, &spr_write_generic,
> + 0);
> +#endif
> +}
> +
> static void init_proc_book3s_64(CPUPPCState *env, int version)
> {
> gen_spr_ne_601(env);
> @@ -8115,6 +8126,7 @@ static void init_proc_book3s_64(CPUPPCState *env, int version)
> gen_spr_vtb(env);
> gen_spr_power8_rpr(env);
> gen_spr_power8_dbell(env);
> + gen_spr_power8_ic(env);
> }
> if (version < BOOK3S_CPU_POWER8) {
> gen_spr_book3s_dbg(env);
>
Reviewed-by: Thomas Huth <thuth@redhat.com>
next prev parent reply other threads:[~2016-03-14 19:40 UTC|newest]
Thread overview: 69+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-14 16:56 [Qemu-devel] [PATCH 00/17] ppc: preparing pnv landing Cédric Le Goater
2016-03-14 16:56 ` [Qemu-devel] [PATCH 01/17] ppc: Update SPR definitions Cédric Le Goater
2016-03-14 18:34 ` Thomas Huth
2016-03-14 16:56 ` [Qemu-devel] [PATCH 02/17] ppc: Add macros to register hypervisor mode SPRs Cédric Le Goater
2016-03-14 18:50 ` Thomas Huth
2016-03-14 16:56 ` [Qemu-devel] [PATCH 03/17] ppc: Add a bunch of hypervisor SPRs to Book3s Cédric Le Goater
2016-03-14 19:14 ` Thomas Huth
2016-03-15 9:43 ` David Gibson
2016-03-15 10:49 ` Thomas Huth
2016-03-15 17:04 ` [Qemu-devel] [Qemu-ppc] " Cédric Le Goater
2016-03-16 1:04 ` [Qemu-devel] " David Gibson
2016-03-14 16:56 ` [Qemu-devel] [PATCH 04/17] ppc: Add number of threads per core to the processor definition Cédric Le Goater
2016-03-14 19:20 ` Thomas Huth
2016-03-15 8:06 ` Cédric Le Goater
2016-03-15 8:21 ` Bharata B Rao
2016-03-15 9:45 ` David Gibson
2016-03-15 21:11 ` Benjamin Herrenschmidt
2016-03-16 0:41 ` David Gibson
2016-03-14 16:56 ` [Qemu-devel] [PATCH 05/17] ppc: Fix hreg_store_msr() so that non-HV mode cannot alter MSR:HV Cédric Le Goater
2016-03-14 19:29 ` Thomas Huth
2016-03-15 9:47 ` David Gibson
2016-03-14 16:56 ` [Qemu-devel] [PATCH 06/17] ppc: Create cpu_ppc_set_papr() helper Cédric Le Goater
2016-03-17 2:34 ` David Gibson
2016-03-17 12:33 ` Cédric Le Goater
2016-03-17 22:03 ` David Gibson
2016-03-14 16:56 ` [Qemu-devel] [PATCH 07/17] ppc: Better figure out if processor has HV mode Cédric Le Goater
2016-03-16 1:05 ` David Gibson
2016-03-14 16:56 ` [Qemu-devel] [PATCH 08/17] ppc: Add placeholder SPRs for DPDES and DHDES on P8 Cédric Le Goater
2016-03-14 19:32 ` Thomas Huth
2016-03-16 1:06 ` David Gibson
2016-03-14 16:56 ` [Qemu-devel] [PATCH 09/17] ppc: SPURR & PURR are HV writeable and privileged Cédric Le Goater
2016-03-14 19:37 ` Thomas Huth
2016-03-16 1:07 ` David Gibson
2016-03-16 1:07 ` David Gibson
2016-03-14 16:56 ` [Qemu-devel] [PATCH 10/17] ppc: Add dummy SPR_IC for POWER8 Cédric Le Goater
2016-03-14 19:40 ` Thomas Huth [this message]
2016-03-16 1:08 ` David Gibson
2016-03-14 16:56 ` [Qemu-devel] [PATCH 11/17] ppc: Initialize AMOR in PAPR mode Cédric Le Goater
2016-03-14 20:13 ` Thomas Huth
2016-03-16 1:09 ` David Gibson
2016-03-17 2:36 ` David Gibson
2016-03-14 16:56 ` [Qemu-devel] [PATCH 12/17] ppc: Fix writing to AMR/UAMOR Cédric Le Goater
2016-03-14 20:26 ` Thomas Huth
2016-03-15 8:05 ` Cédric Le Goater
2016-03-14 16:56 ` [Qemu-devel] [PATCH 13/17] ppc: Add POWER8 IAMR register Cédric Le Goater
2016-03-14 20:36 ` Thomas Huth
2016-03-14 16:56 ` [Qemu-devel] [PATCH 14/17] ppc: Add dummy write to VTB Cédric Le Goater
2016-03-14 20:54 ` Thomas Huth
2016-03-14 21:07 ` [Qemu-devel] [Qemu-ppc] " Benjamin Herrenschmidt
2016-03-16 1:12 ` [Qemu-devel] " David Gibson
2016-03-14 16:56 ` [Qemu-devel] [PATCH 15/17] ppc: Add dummy POWER8 MPPR register Cédric Le Goater
2016-03-16 1:14 ` David Gibson
2016-03-16 6:17 ` Thomas Huth
2016-03-16 9:24 ` Cédric Le Goater
2016-03-14 16:56 ` [Qemu-devel] [PATCH 16/17] ppc: Add dummy CIABR SPR Cédric Le Goater
2016-03-14 20:00 ` Thomas Huth
2016-03-16 1:14 ` David Gibson
2016-03-16 6:24 ` Thomas Huth
2016-03-16 22:28 ` David Gibson
2016-03-14 16:56 ` [Qemu-devel] [PATCH 17/17] ppc: A couple more dummy POWER8 Book4 regs Cédric Le Goater
2016-03-14 20:08 ` Thomas Huth
2016-03-16 1:15 ` David Gibson
2016-03-15 0:39 ` [Qemu-devel] [PATCH 00/17] ppc: preparing pnv landing David Gibson
2016-03-15 8:11 ` Cédric Le Goater
2016-03-16 1:19 ` David Gibson
2016-03-16 9:08 ` Cédric Le Goater
2016-03-17 2:45 ` David Gibson
2016-03-17 14:28 ` Cédric Le Goater
2016-03-21 0:59 ` David Gibson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=56E713BE.10106@redhat.com \
--to=thuth@redhat.com \
--cc=clg@fr.ibm.com \
--cc=david@gibson.dropbear.id.au \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).