* [Qemu-devel] [PATCH v5 0/8] QOM'ify hw/timer/*
@ 2016-02-25 10:30 xiaoqiang zhao
2016-02-25 10:30 ` [Qemu-devel] [PATCH v5 1/8] hw/timer: QOM'ify etraxfs_timer xiaoqiang zhao
` (8 more replies)
0 siblings, 9 replies; 13+ messages in thread
From: xiaoqiang zhao @ 2016-02-25 10:30 UTC (permalink / raw)
To: qemu-devel
Cc: peter.maydell, i.mitsyanko, mark.cave-ayland, michael, qemu-arm,
edgar.iglesias, gxt, afaerber
This patch series QOM'ify timer code under hw/timer directory.
Main idea is to split the initfn's work, some to TypeInfo.instance_init
and some is placed in DeviceClass::realize.
Drop the use of SysBusDeviceClass::init if possible.
Patch 3,4 (m48t59) has been tested in a sparc vm with debian linux guest
and savevm/loadvm looks fine.
Comments from the relevant maintainers are needed!
changes in v5:
* drop patch 'hw/timer: QOM'ify tusb6010'
* fix minor errors in grlib_gptimer.c
* correct the usage of vmstate for M48txxISAState and M48txxSysBusState
changes in v4:
* correct some misused "Reviewed-by" tags
* fix 'make check' fail case in the "/arm/device/introspect/concrete"
test in tusb6010.c
changes in v3:
* remove unnecessary OBJECT cast
* refine some commit message
* use DeviceClass::vmsd instead of vmstate_register to register
the VMState if possible
changes in v2:
fix a stupid typo (timmer->timer)
xiaoqiang zhao (8):
hw/timer: QOM'ify etraxfs_timer
hw/timer: QOM'ify lm32_timer
hw/timer: QOM'ify m48txx_sysbus (pass 1)
hw/timer: QOM'ify m48txx_sysbus (pass 2)
hw/timer: QOM'ify milkymist_sysctl
hw/timer: QOM'ify puv3_ost
hw/timer: QOM'ify slavio_timer
hw/timer: QOM'ify grlib_gptimer
hw/timer/etraxfs_timer.c | 14 +++++------
hw/timer/grlib_gptimer.c | 32 ++++++++++++++----------
hw/timer/lm32_timer.c | 19 +++++++++------
hw/timer/m48t59.c | 59 ++++++++++++++++++++++++++++++---------------
hw/timer/milkymist-sysctl.c | 21 ++++++++++------
hw/timer/puv3_ost.c | 18 ++++----------
hw/timer/slavio_timer.c | 12 ++++-----
7 files changed, 101 insertions(+), 74 deletions(-)
--
2.1.4
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Qemu-devel] [PATCH v5 1/8] hw/timer: QOM'ify etraxfs_timer
2016-02-25 10:30 [Qemu-devel] [PATCH v5 0/8] QOM'ify hw/timer/* xiaoqiang zhao
@ 2016-02-25 10:30 ` xiaoqiang zhao
2016-02-25 10:30 ` [Qemu-devel] [PATCH v5 2/8] hw/timer: QOM'ify lm32_timer xiaoqiang zhao
` (7 subsequent siblings)
8 siblings, 0 replies; 13+ messages in thread
From: xiaoqiang zhao @ 2016-02-25 10:30 UTC (permalink / raw)
To: qemu-devel
Cc: peter.maydell, i.mitsyanko, mark.cave-ayland, michael, qemu-arm,
edgar.iglesias, gxt, afaerber
assign etraxfs_timer_init to etraxfs_timer_info.instance_init
and drop the SysBusDeviceClass::init
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com>
---
hw/timer/etraxfs_timer.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/hw/timer/etraxfs_timer.c b/hw/timer/etraxfs_timer.c
index 36d8f46..4f115c7 100644
--- a/hw/timer/etraxfs_timer.c
+++ b/hw/timer/etraxfs_timer.c
@@ -315,9 +315,10 @@ static void etraxfs_timer_reset(void *opaque)
qemu_irq_lower(t->irq);
}
-static int etraxfs_timer_init(SysBusDevice *dev)
+static void etraxfs_timer_init(Object *obj)
{
- ETRAXTimerState *t = ETRAX_TIMER(dev);
+ ETRAXTimerState *t = ETRAX_TIMER(obj);
+ SysBusDevice *dev = SYS_BUS_DEVICE(obj);
t->bh_t0 = qemu_bh_new(timer0_hit, t);
t->bh_t1 = qemu_bh_new(timer1_hit, t);
@@ -329,24 +330,23 @@ static int etraxfs_timer_init(SysBusDevice *dev)
sysbus_init_irq(dev, &t->irq);
sysbus_init_irq(dev, &t->nmi);
- memory_region_init_io(&t->mmio, OBJECT(t), &timer_ops, t,
+ memory_region_init_io(&t->mmio, obj, &timer_ops, t,
"etraxfs-timer", 0x5c);
sysbus_init_mmio(dev, &t->mmio);
- qemu_register_reset(etraxfs_timer_reset, t);
- return 0;
}
static void etraxfs_timer_class_init(ObjectClass *klass, void *data)
{
- SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
+ DeviceClass *dc = DEVICE_CLASS(klass);
- sdc->init = etraxfs_timer_init;
+ dc->reset = etraxfs_timer_reset;
}
static const TypeInfo etraxfs_timer_info = {
.name = TYPE_ETRAX_FS_TIMER,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(ETRAXTimerState),
+ .instance_init = etraxfs_timer_init,
.class_init = etraxfs_timer_class_init,
};
--
2.1.4
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [Qemu-devel] [PATCH v5 2/8] hw/timer: QOM'ify lm32_timer
2016-02-25 10:30 [Qemu-devel] [PATCH v5 0/8] QOM'ify hw/timer/* xiaoqiang zhao
2016-02-25 10:30 ` [Qemu-devel] [PATCH v5 1/8] hw/timer: QOM'ify etraxfs_timer xiaoqiang zhao
@ 2016-02-25 10:30 ` xiaoqiang zhao
2016-02-25 10:30 ` [Qemu-devel] [PATCH v5 3/8] hw/timer: QOM'ify m48txx_sysbus (pass 1) xiaoqiang zhao
` (6 subsequent siblings)
8 siblings, 0 replies; 13+ messages in thread
From: xiaoqiang zhao @ 2016-02-25 10:30 UTC (permalink / raw)
To: qemu-devel
Cc: peter.maydell, i.mitsyanko, mark.cave-ayland, michael, qemu-arm,
edgar.iglesias, gxt, afaerber
* split the old SysBus init function into an instance_init
and a Device realize function
* use DeviceClass::realize instead of SysBusDeviceClass::init
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com>
---
hw/timer/lm32_timer.c | 19 ++++++++++++-------
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/hw/timer/lm32_timer.c b/hw/timer/lm32_timer.c
index 3198355..e45a65b 100644
--- a/hw/timer/lm32_timer.c
+++ b/hw/timer/lm32_timer.c
@@ -176,21 +176,26 @@ static void timer_reset(DeviceState *d)
ptimer_stop(s->ptimer);
}
-static int lm32_timer_init(SysBusDevice *dev)
+static void lm32_timer_init(Object *obj)
{
- LM32TimerState *s = LM32_TIMER(dev);
+ LM32TimerState *s = LM32_TIMER(obj);
+ SysBusDevice *dev = SYS_BUS_DEVICE(obj);
sysbus_init_irq(dev, &s->irq);
s->bh = qemu_bh_new(timer_hit, s);
s->ptimer = ptimer_init(s->bh);
- ptimer_set_freq(s->ptimer, s->freq_hz);
- memory_region_init_io(&s->iomem, OBJECT(s), &timer_ops, s,
+ memory_region_init_io(&s->iomem, obj, &timer_ops, s,
"timer", R_MAX * 4);
sysbus_init_mmio(dev, &s->iomem);
+}
- return 0;
+static void lm32_timer_realize(DeviceState *dev, Error **errp)
+{
+ LM32TimerState *s = LM32_TIMER(dev);
+
+ ptimer_set_freq(s->ptimer, s->freq_hz);
}
static const VMStateDescription vmstate_lm32_timer = {
@@ -213,9 +218,8 @@ static Property lm32_timer_properties[] = {
static void lm32_timer_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
- k->init = lm32_timer_init;
+ dc->realize = lm32_timer_realize;
dc->reset = timer_reset;
dc->vmsd = &vmstate_lm32_timer;
dc->props = lm32_timer_properties;
@@ -225,6 +229,7 @@ static const TypeInfo lm32_timer_info = {
.name = TYPE_LM32_TIMER,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(LM32TimerState),
+ .instance_init = lm32_timer_init,
.class_init = lm32_timer_class_init,
};
--
2.1.4
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [Qemu-devel] [PATCH v5 3/8] hw/timer: QOM'ify m48txx_sysbus (pass 1)
2016-02-25 10:30 [Qemu-devel] [PATCH v5 0/8] QOM'ify hw/timer/* xiaoqiang zhao
2016-02-25 10:30 ` [Qemu-devel] [PATCH v5 1/8] hw/timer: QOM'ify etraxfs_timer xiaoqiang zhao
2016-02-25 10:30 ` [Qemu-devel] [PATCH v5 2/8] hw/timer: QOM'ify lm32_timer xiaoqiang zhao
@ 2016-02-25 10:30 ` xiaoqiang zhao
2016-02-25 10:30 ` [Qemu-devel] [PATCH v5 4/8] hw/timer: QOM'ify m48txx_sysbus (pass 2) xiaoqiang zhao
` (5 subsequent siblings)
8 siblings, 0 replies; 13+ messages in thread
From: xiaoqiang zhao @ 2016-02-25 10:30 UTC (permalink / raw)
To: qemu-devel
Cc: peter.maydell, i.mitsyanko, mark.cave-ayland, michael, qemu-arm,
edgar.iglesias, gxt, afaerber
* split the old SysBus init function into an instance_init
and a Device realize function
* use DeviceClass::realize instead of SysBusDeviceClass::init
Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com>
---
hw/timer/m48t59.c | 35 ++++++++++++++++++-----------------
1 file changed, 18 insertions(+), 17 deletions(-)
diff --git a/hw/timer/m48t59.c b/hw/timer/m48t59.c
index bbcfeb2..3c683aa 100644
--- a/hw/timer/m48t59.c
+++ b/hw/timer/m48t59.c
@@ -763,30 +763,31 @@ static void m48t59_isa_realize(DeviceState *dev, Error **errp)
}
}
-static int m48t59_init1(SysBusDevice *dev)
+static void m48t59_init1(Object *obj)
{
- M48txxSysBusDeviceClass *u = M48TXX_SYS_BUS_GET_CLASS(dev);
- M48txxSysBusState *d = M48TXX_SYS_BUS(dev);
- Object *o = OBJECT(dev);
+ M48txxSysBusDeviceClass *u = M48TXX_SYS_BUS_GET_CLASS(obj);
+ M48txxSysBusState *d = M48TXX_SYS_BUS(obj);
+ SysBusDevice *dev = SYS_BUS_DEVICE(obj);
M48t59State *s = &d->state;
- Error *err = NULL;
s->model = u->info.model;
s->size = u->info.size;
sysbus_init_irq(dev, &s->IRQ);
- memory_region_init_io(&s->iomem, o, &nvram_ops, s, "m48t59.nvram",
+ memory_region_init_io(&s->iomem, obj, &nvram_ops, s, "m48t59.nvram",
s->size);
- memory_region_init_io(&d->io, o, &m48t59_io_ops, s, "m48t59", 4);
- sysbus_init_mmio(dev, &s->iomem);
- sysbus_init_mmio(dev, &d->io);
- m48t59_realize_common(s, &err);
- if (err != NULL) {
- error_free(err);
- return -1;
- }
+ memory_region_init_io(&d->io, obj, &m48t59_io_ops, s, "m48t59", 4);
+}
- return 0;
+static void m48t59_realize(DeviceState *dev, Error **errp)
+{
+ M48txxSysBusState *d = M48TXX_SYS_BUS(dev);
+ M48t59State *s = &d->state;
+ SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
+
+ sysbus_init_mmio(sbd, &s->iomem);
+ sysbus_init_mmio(sbd, &d->io);
+ m48t59_realize_common(s, errp);
}
static uint32_t m48txx_isa_read(Nvram *obj, uint32_t addr)
@@ -860,10 +861,9 @@ static Property m48t59_sysbus_properties[] = {
static void m48txx_sysbus_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
NvramClass *nc = NVRAM_CLASS(klass);
- k->init = m48t59_init1;
+ dc->realize = m48t59_realize;
dc->reset = m48t59_reset_sysbus;
dc->props = m48t59_sysbus_properties;
nc->read = m48txx_sysbus_read;
@@ -889,6 +889,7 @@ static const TypeInfo m48txx_sysbus_type_info = {
.name = TYPE_M48TXX_SYS_BUS,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(M48txxSysBusState),
+ .instance_init = m48t59_init1,
.abstract = true,
.class_init = m48txx_sysbus_class_init,
.interfaces = (InterfaceInfo[]) {
--
2.1.4
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [Qemu-devel] [PATCH v5 4/8] hw/timer: QOM'ify m48txx_sysbus (pass 2)
2016-02-25 10:30 [Qemu-devel] [PATCH v5 0/8] QOM'ify hw/timer/* xiaoqiang zhao
` (2 preceding siblings ...)
2016-02-25 10:30 ` [Qemu-devel] [PATCH v5 3/8] hw/timer: QOM'ify m48txx_sysbus (pass 1) xiaoqiang zhao
@ 2016-02-25 10:30 ` xiaoqiang zhao
2016-02-25 10:52 ` Peter Maydell
2016-02-25 10:30 ` [Qemu-devel] [PATCH v5 5/8] hw/timer: QOM'ify milkymist_sysctl xiaoqiang zhao
` (4 subsequent siblings)
8 siblings, 1 reply; 13+ messages in thread
From: xiaoqiang zhao @ 2016-02-25 10:30 UTC (permalink / raw)
To: qemu-devel
Cc: peter.maydell, i.mitsyanko, mark.cave-ayland, michael, qemu-arm,
edgar.iglesias, gxt, afaerber
assign DeviceClass::vmsd instead of using vmstate_register function
Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com>
---
hw/timer/m48t59.c | 24 ++++++++++++++++++++++--
1 file changed, 22 insertions(+), 2 deletions(-)
diff --git a/hw/timer/m48t59.c b/hw/timer/m48t59.c
index 3c683aa..f5897d8 100644
--- a/hw/timer/m48t59.c
+++ b/hw/timer/m48t59.c
@@ -637,6 +637,26 @@ static const VMStateDescription vmstate_m48t59 = {
}
};
+static const VMStateDescription vmstate_m48t59_isa = {
+ .name = "m48t59",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (VMStateField[]) {
+ VMSTATE_STRUCT(state, M48txxISAState, 0, vmstate_m48t59, M48t59State),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+static const VMStateDescription vmstate_m48t59_sys_bus = {
+ .name = "m48t59",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (VMStateField[]) {
+ VMSTATE_STRUCT(state, M48txxSysBusState, 0, vmstate_m48t59, M48t59State),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
static void m48t59_reset_common(M48t59State *NVRAM)
{
NVRAM->addr = 0;
@@ -742,8 +762,6 @@ static void m48t59_realize_common(M48t59State *s, Error **errp)
s->wd_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, &watchdog_cb, s);
}
qemu_get_timedate(&s->alarm, 0);
-
- vmstate_register(NULL, -1, &vmstate_m48t59, s);
}
static void m48t59_isa_realize(DeviceState *dev, Error **errp)
@@ -822,6 +840,7 @@ static void m48txx_isa_class_init(ObjectClass *klass, void *data)
dc->realize = m48t59_isa_realize;
dc->reset = m48t59_reset_isa;
dc->props = m48t59_isa_properties;
+ dc->vmsd = &vmstate_m48t59_isa;
nc->read = m48txx_isa_read;
nc->write = m48txx_isa_write;
nc->toggle_lock = m48txx_isa_toggle_lock;
@@ -866,6 +885,7 @@ static void m48txx_sysbus_class_init(ObjectClass *klass, void *data)
dc->realize = m48t59_realize;
dc->reset = m48t59_reset_sysbus;
dc->props = m48t59_sysbus_properties;
+ dc->vmsd = &vmstate_m48t59_sys_bus;
nc->read = m48txx_sysbus_read;
nc->write = m48txx_sysbus_write;
nc->toggle_lock = m48txx_sysbus_toggle_lock;
--
2.1.4
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [Qemu-devel] [PATCH v5 5/8] hw/timer: QOM'ify milkymist_sysctl
2016-02-25 10:30 [Qemu-devel] [PATCH v5 0/8] QOM'ify hw/timer/* xiaoqiang zhao
` (3 preceding siblings ...)
2016-02-25 10:30 ` [Qemu-devel] [PATCH v5 4/8] hw/timer: QOM'ify m48txx_sysbus (pass 2) xiaoqiang zhao
@ 2016-02-25 10:30 ` xiaoqiang zhao
2016-02-25 10:30 ` [Qemu-devel] [PATCH v5 6/8] hw/timer: QOM'ify puv3_ost xiaoqiang zhao
` (3 subsequent siblings)
8 siblings, 0 replies; 13+ messages in thread
From: xiaoqiang zhao @ 2016-02-25 10:30 UTC (permalink / raw)
To: qemu-devel
Cc: peter.maydell, i.mitsyanko, mark.cave-ayland, michael, qemu-arm,
edgar.iglesias, gxt, afaerber
* split the old SysBus init function into an instance_init
and a Device realize function
* use DeviceClass::realize instead of SysBusDeviceClass::init
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com>
---
hw/timer/milkymist-sysctl.c | 21 +++++++++++++--------
1 file changed, 13 insertions(+), 8 deletions(-)
diff --git a/hw/timer/milkymist-sysctl.c b/hw/timer/milkymist-sysctl.c
index 5f29480..30a4bc4 100644
--- a/hw/timer/milkymist-sysctl.c
+++ b/hw/timer/milkymist-sysctl.c
@@ -270,9 +270,10 @@ static void milkymist_sysctl_reset(DeviceState *d)
s->regs[R_GPIO_IN] = s->strappings;
}
-static int milkymist_sysctl_init(SysBusDevice *dev)
+static void milkymist_sysctl_init(Object *obj)
{
- MilkymistSysctlState *s = MILKYMIST_SYSCTL(dev);
+ MilkymistSysctlState *s = MILKYMIST_SYSCTL(obj);
+ SysBusDevice *dev = SYS_BUS_DEVICE(obj);
sysbus_init_irq(dev, &s->gpio_irq);
sysbus_init_irq(dev, &s->timer0_irq);
@@ -282,14 +283,18 @@ static int milkymist_sysctl_init(SysBusDevice *dev)
s->bh1 = qemu_bh_new(timer1_hit, s);
s->ptimer0 = ptimer_init(s->bh0);
s->ptimer1 = ptimer_init(s->bh1);
- ptimer_set_freq(s->ptimer0, s->freq_hz);
- ptimer_set_freq(s->ptimer1, s->freq_hz);
- memory_region_init_io(&s->regs_region, OBJECT(s), &sysctl_mmio_ops, s,
+ memory_region_init_io(&s->regs_region, obj, &sysctl_mmio_ops, s,
"milkymist-sysctl", R_MAX * 4);
sysbus_init_mmio(dev, &s->regs_region);
+}
- return 0;
+static void milkymist_sysctl_realize(DeviceState *dev, Error **errp)
+{
+ MilkymistSysctlState *s = MILKYMIST_SYSCTL(dev);
+
+ ptimer_set_freq(s->ptimer0, s->freq_hz);
+ ptimer_set_freq(s->ptimer1, s->freq_hz);
}
static const VMStateDescription vmstate_milkymist_sysctl = {
@@ -319,9 +324,8 @@ static Property milkymist_sysctl_properties[] = {
static void milkymist_sysctl_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
- k->init = milkymist_sysctl_init;
+ dc->realize = milkymist_sysctl_realize;
dc->reset = milkymist_sysctl_reset;
dc->vmsd = &vmstate_milkymist_sysctl;
dc->props = milkymist_sysctl_properties;
@@ -331,6 +335,7 @@ static const TypeInfo milkymist_sysctl_info = {
.name = TYPE_MILKYMIST_SYSCTL,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(MilkymistSysctlState),
+ .instance_init = milkymist_sysctl_init,
.class_init = milkymist_sysctl_class_init,
};
--
2.1.4
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [Qemu-devel] [PATCH v5 6/8] hw/timer: QOM'ify puv3_ost
2016-02-25 10:30 [Qemu-devel] [PATCH v5 0/8] QOM'ify hw/timer/* xiaoqiang zhao
` (4 preceding siblings ...)
2016-02-25 10:30 ` [Qemu-devel] [PATCH v5 5/8] hw/timer: QOM'ify milkymist_sysctl xiaoqiang zhao
@ 2016-02-25 10:30 ` xiaoqiang zhao
2016-02-25 10:30 ` [Qemu-devel] [PATCH v5 7/8] hw/timer: QOM'ify slavio_timer xiaoqiang zhao
` (2 subsequent siblings)
8 siblings, 0 replies; 13+ messages in thread
From: xiaoqiang zhao @ 2016-02-25 10:30 UTC (permalink / raw)
To: qemu-devel
Cc: peter.maydell, i.mitsyanko, mark.cave-ayland, michael, qemu-arm,
edgar.iglesias, gxt, afaerber
assign puv3_ost_init to puv3_ost_info.instance_init
and drop the SysBusDeviceClass::init
Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com>
---
hw/timer/puv3_ost.c | 18 +++++-------------
1 file changed, 5 insertions(+), 13 deletions(-)
diff --git a/hw/timer/puv3_ost.c b/hw/timer/puv3_ost.c
index 93650b7..72c87ba 100644
--- a/hw/timer/puv3_ost.c
+++ b/hw/timer/puv3_ost.c
@@ -113,9 +113,10 @@ static void puv3_ost_tick(void *opaque)
}
}
-static int puv3_ost_init(SysBusDevice *dev)
+static void puv3_ost_init(Object *obj)
{
- PUV3OSTState *s = PUV3_OST(dev);
+ PUV3OSTState *s = PUV3_OST(obj);
+ SysBusDevice *dev = SYS_BUS_DEVICE(obj);
s->reg_OIER = 0;
s->reg_OSSR = 0;
@@ -128,25 +129,16 @@ static int puv3_ost_init(SysBusDevice *dev)
s->ptimer = ptimer_init(s->bh);
ptimer_set_freq(s->ptimer, 50 * 1000 * 1000);
- memory_region_init_io(&s->iomem, OBJECT(s), &puv3_ost_ops, s, "puv3_ost",
+ memory_region_init_io(&s->iomem, obj, &puv3_ost_ops, s, "puv3_ost",
PUV3_REGS_OFFSET);
sysbus_init_mmio(dev, &s->iomem);
-
- return 0;
-}
-
-static void puv3_ost_class_init(ObjectClass *klass, void *data)
-{
- SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
-
- sdc->init = puv3_ost_init;
}
static const TypeInfo puv3_ost_info = {
.name = TYPE_PUV3_OST,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(PUV3OSTState),
- .class_init = puv3_ost_class_init,
+ .instance_init = puv3_ost_init,
};
static void puv3_ost_register_type(void)
--
2.1.4
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [Qemu-devel] [PATCH v5 7/8] hw/timer: QOM'ify slavio_timer
2016-02-25 10:30 [Qemu-devel] [PATCH v5 0/8] QOM'ify hw/timer/* xiaoqiang zhao
` (5 preceding siblings ...)
2016-02-25 10:30 ` [Qemu-devel] [PATCH v5 6/8] hw/timer: QOM'ify puv3_ost xiaoqiang zhao
@ 2016-02-25 10:30 ` xiaoqiang zhao
2016-02-25 10:30 ` [Qemu-devel] [PATCH v5 8/8] hw/timer: QOM'ify grlib_gptimer xiaoqiang zhao
2016-02-25 10:53 ` [Qemu-devel] [PATCH v5 0/8] QOM'ify hw/timer/* Peter Maydell
8 siblings, 0 replies; 13+ messages in thread
From: xiaoqiang zhao @ 2016-02-25 10:30 UTC (permalink / raw)
To: qemu-devel
Cc: peter.maydell, i.mitsyanko, mark.cave-ayland, michael, qemu-arm,
edgar.iglesias, gxt, afaerber
rename slavio_timer_init1 to slavio_timer_init and assign
it to slavio_timer_info.instance_init, then we drop the
SysBusDeviceClass::init
Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com>
---
hw/timer/slavio_timer.c | 12 +++++-------
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/hw/timer/slavio_timer.c b/hw/timer/slavio_timer.c
index fb3e08b..b2c9364 100644
--- a/hw/timer/slavio_timer.c
+++ b/hw/timer/slavio_timer.c
@@ -373,9 +373,10 @@ static void slavio_timer_reset(DeviceState *d)
s->cputimer_mode = 0;
}
-static int slavio_timer_init1(SysBusDevice *dev)
+static void slavio_timer_init(Object *obj)
{
- SLAVIO_TIMERState *s = SLAVIO_TIMER(dev);
+ SLAVIO_TIMERState *s = SLAVIO_TIMER(obj);
+ SysBusDevice *dev = SYS_BUS_DEVICE(obj);
QEMUBH *bh;
unsigned int i;
TimerContext *tc;
@@ -394,14 +395,12 @@ static int slavio_timer_init1(SysBusDevice *dev)
size = i == 0 ? SYS_TIMER_SIZE : CPU_TIMER_SIZE;
snprintf(timer_name, sizeof(timer_name), "timer-%i", i);
- memory_region_init_io(&tc->iomem, OBJECT(s), &slavio_timer_mem_ops, tc,
+ memory_region_init_io(&tc->iomem, obj, &slavio_timer_mem_ops, tc,
timer_name, size);
sysbus_init_mmio(dev, &tc->iomem);
sysbus_init_irq(dev, &s->cputimer[i].irq);
}
-
- return 0;
}
static Property slavio_timer_properties[] = {
@@ -412,9 +411,7 @@ static Property slavio_timer_properties[] = {
static void slavio_timer_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
- k->init = slavio_timer_init1;
dc->reset = slavio_timer_reset;
dc->vmsd = &vmstate_slavio_timer;
dc->props = slavio_timer_properties;
@@ -424,6 +421,7 @@ static const TypeInfo slavio_timer_info = {
.name = TYPE_SLAVIO_TIMER,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(SLAVIO_TIMERState),
+ .instance_init = slavio_timer_init,
.class_init = slavio_timer_class_init,
};
--
2.1.4
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [Qemu-devel] [PATCH v5 8/8] hw/timer: QOM'ify grlib_gptimer
2016-02-25 10:30 [Qemu-devel] [PATCH v5 0/8] QOM'ify hw/timer/* xiaoqiang zhao
` (6 preceding siblings ...)
2016-02-25 10:30 ` [Qemu-devel] [PATCH v5 7/8] hw/timer: QOM'ify slavio_timer xiaoqiang zhao
@ 2016-02-25 10:30 ` xiaoqiang zhao
2016-02-25 10:53 ` [Qemu-devel] [PATCH v5 0/8] QOM'ify hw/timer/* Peter Maydell
8 siblings, 0 replies; 13+ messages in thread
From: xiaoqiang zhao @ 2016-02-25 10:30 UTC (permalink / raw)
To: qemu-devel
Cc: peter.maydell, i.mitsyanko, mark.cave-ayland, michael, qemu-arm,
edgar.iglesias, gxt, afaerber
* split the old SysBus init function into an instance_init
and a Device realize function
* use DeviceClass::realize instead of SysBusDeviceClass::init
Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com>
---
hw/timer/grlib_gptimer.c | 32 +++++++++++++++++++-------------
1 file changed, 19 insertions(+), 13 deletions(-)
diff --git a/hw/timer/grlib_gptimer.c b/hw/timer/grlib_gptimer.c
index dd000f5..95d5b0d 100644
--- a/hw/timer/grlib_gptimer.c
+++ b/hw/timer/grlib_gptimer.c
@@ -348,16 +348,29 @@ static void grlib_gptimer_reset(DeviceState *d)
}
}
-static int grlib_gptimer_init(SysBusDevice *dev)
+static void grlib_gptimer_init(Object *obj)
{
- GPTimerUnit *unit = GRLIB_GPTIMER(dev);
- unsigned int i;
+ GPTimerUnit *unit = GRLIB_GPTIMER(obj);
+ SysBusDevice *dev = SYS_BUS_DEVICE(obj);
assert(unit->nr_timers > 0);
assert(unit->nr_timers <= GPTIMER_MAX_TIMERS);
unit->timers = g_malloc0(sizeof unit->timers[0] * unit->nr_timers);
+ memory_region_init_io(&unit->iomem, obj, &grlib_gptimer_ops,
+ unit, "gptimer",
+ UNIT_REG_SIZE + GPTIMER_REG_SIZE * unit->nr_timers);
+
+ sysbus_init_mmio(dev, &unit->iomem);
+}
+
+static void grlib_gptimer_realize(DeviceState *dev, Error **errp)
+{
+ GPTimerUnit *unit = GRLIB_GPTIMER(dev);
+ SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
+ unsigned int i;
+
for (i = 0; i < unit->nr_timers; i++) {
GPTimer *timer = &unit->timers[i];
@@ -367,17 +380,10 @@ static int grlib_gptimer_init(SysBusDevice *dev)
timer->id = i;
/* One IRQ line for each timer */
- sysbus_init_irq(dev, &timer->irq);
+ sysbus_init_irq(sbd, &timer->irq);
ptimer_set_freq(timer->ptimer, unit->freq_hz);
}
-
- memory_region_init_io(&unit->iomem, OBJECT(unit), &grlib_gptimer_ops,
- unit, "gptimer",
- UNIT_REG_SIZE + GPTIMER_REG_SIZE * unit->nr_timers);
-
- sysbus_init_mmio(dev, &unit->iomem);
- return 0;
}
static Property grlib_gptimer_properties[] = {
@@ -390,9 +396,8 @@ static Property grlib_gptimer_properties[] = {
static void grlib_gptimer_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
- k->init = grlib_gptimer_init;
+ dc->realize = grlib_gptimer_realize;
dc->reset = grlib_gptimer_reset;
dc->props = grlib_gptimer_properties;
}
@@ -401,6 +406,7 @@ static const TypeInfo grlib_gptimer_info = {
.name = TYPE_GRLIB_GPTIMER,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(GPTimerUnit),
+ .instance_init = grlib_gptimer_init,
.class_init = grlib_gptimer_class_init,
};
--
2.1.4
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [Qemu-devel] [PATCH v5 4/8] hw/timer: QOM'ify m48txx_sysbus (pass 2)
2016-02-25 10:30 ` [Qemu-devel] [PATCH v5 4/8] hw/timer: QOM'ify m48txx_sysbus (pass 2) xiaoqiang zhao
@ 2016-02-25 10:52 ` Peter Maydell
0 siblings, 0 replies; 13+ messages in thread
From: Peter Maydell @ 2016-02-25 10:52 UTC (permalink / raw)
To: xiaoqiang zhao
Cc: Igor Mitsyanko, Mark Cave-Ayland, QEMU Developers, Michael Walle,
qemu-arm, Edgar E. Iglesias, Guan Xuetao, Andreas Färber
On 25 February 2016 at 10:30, xiaoqiang zhao <zxq_yx_007@163.com> wrote:
> assign DeviceClass::vmsd instead of using vmstate_register function
>
> Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com>
> ---
> hw/timer/m48t59.c | 24 ++++++++++++++++++++++--
> 1 file changed, 22 insertions(+), 2 deletions(-)
So, did you test this, and if so what did you do?
thanks
-- PMM
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [Qemu-devel] [PATCH v5 0/8] QOM'ify hw/timer/*
2016-02-25 10:30 [Qemu-devel] [PATCH v5 0/8] QOM'ify hw/timer/* xiaoqiang zhao
` (7 preceding siblings ...)
2016-02-25 10:30 ` [Qemu-devel] [PATCH v5 8/8] hw/timer: QOM'ify grlib_gptimer xiaoqiang zhao
@ 2016-02-25 10:53 ` Peter Maydell
2016-03-03 6:31 ` hitmoon
8 siblings, 1 reply; 13+ messages in thread
From: Peter Maydell @ 2016-02-25 10:53 UTC (permalink / raw)
To: xiaoqiang zhao
Cc: Igor Mitsyanko, Mark Cave-Ayland, QEMU Developers, Michael Walle,
qemu-arm, Edgar E. Iglesias, Guan Xuetao, Andreas Färber
On 25 February 2016 at 10:30, xiaoqiang zhao <zxq_yx_007@163.com> wrote:
> This patch series QOM'ify timer code under hw/timer directory.
> Main idea is to split the initfn's work, some to TypeInfo.instance_init
> and some is placed in DeviceClass::realize.
> Drop the use of SysBusDeviceClass::init if possible.
>
> Patch 3,4 (m48t59) has been tested in a sparc vm with debian linux guest
> and savevm/loadvm looks fine.
...ah, I see you answered my question about testing here. Thanks.
-- PMM
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [Qemu-devel] [PATCH v5 0/8] QOM'ify hw/timer/*
2016-02-25 10:53 ` [Qemu-devel] [PATCH v5 0/8] QOM'ify hw/timer/* Peter Maydell
@ 2016-03-03 6:31 ` hitmoon
2016-03-16 2:26 ` hitmoon
0 siblings, 1 reply; 13+ messages in thread
From: hitmoon @ 2016-03-03 6:31 UTC (permalink / raw)
To: Peter Maydell
Cc: Igor Mitsyanko, Mark Cave-Ayland, QEMU Developers, Michael Walle,
qemu-arm, Edgar E. Iglesias, Guan Xuetao, Andreas Färber
[-- Attachment #1: Type: text/plain, Size: 555 bytes --]
On 25 February 2016 at 10:30, xiaoqiang zhao <zxq_yx_007@163.com> wrote:
> This patch series QOM'ify timer code under hw/timer directory.
> Main idea is to split the initfn's work, some to TypeInfo.instance_init
> and some is placed in DeviceClass::realize.
> Drop the use of SysBusDeviceClass::init if possible.
>
> Patch 3,4 (m48t59) has been tested in a sparc vm with debian linux guest
> and savevm/loadvm looks fine.
> Comments from the relevant maintainers are needed!
ping ...
http://lists.nongnu.org/archive/html/qemu-devel/2016-02/msg05859.html
[-- Attachment #2: Type: text/html, Size: 1617 bytes --]
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [Qemu-devel] [PATCH v5 0/8] QOM'ify hw/timer/*
2016-03-03 6:31 ` hitmoon
@ 2016-03-16 2:26 ` hitmoon
0 siblings, 0 replies; 13+ messages in thread
From: hitmoon @ 2016-03-16 2:26 UTC (permalink / raw)
To: Peter Maydell
Cc: Igor Mitsyanko, Mark Cave-Ayland, QEMU Developers, Michael Walle,
qemu-arm, Edgar E. Iglesias, Guan Xuetao, Andreas Färber
[-- Attachment #1: Type: text/plain, Size: 640 bytes --]
在 2016年03月03日 14:31, hitmoon 写道:
> On 25 February 2016 at 10:30, xiaoqiang zhao<zxq_yx_007@163.com> wrote:
>> This patch series QOM'ify timer code under hw/timer directory.
>> Main idea is to split the initfn's work, some to TypeInfo.instance_init
>> and some is placed in DeviceClass::realize.
>> Drop the use of SysBusDeviceClass::init if possible.
>>
>> Patch 3,4 (m48t59) has been tested in a sparc vm with debian linux guest
>> and savevm/loadvm looks fine.
>> Comments from the relevant maintainers are needed!
> ping ...
> http://lists.nongnu.org/archive/html/qemu-devel/2016-02/msg05859.html
ping! Any comment guys ?
[-- Attachment #2: Type: text/html, Size: 1982 bytes --]
^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2016-03-16 2:28 UTC | newest]
Thread overview: 13+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2016-02-25 10:30 [Qemu-devel] [PATCH v5 0/8] QOM'ify hw/timer/* xiaoqiang zhao
2016-02-25 10:30 ` [Qemu-devel] [PATCH v5 1/8] hw/timer: QOM'ify etraxfs_timer xiaoqiang zhao
2016-02-25 10:30 ` [Qemu-devel] [PATCH v5 2/8] hw/timer: QOM'ify lm32_timer xiaoqiang zhao
2016-02-25 10:30 ` [Qemu-devel] [PATCH v5 3/8] hw/timer: QOM'ify m48txx_sysbus (pass 1) xiaoqiang zhao
2016-02-25 10:30 ` [Qemu-devel] [PATCH v5 4/8] hw/timer: QOM'ify m48txx_sysbus (pass 2) xiaoqiang zhao
2016-02-25 10:52 ` Peter Maydell
2016-02-25 10:30 ` [Qemu-devel] [PATCH v5 5/8] hw/timer: QOM'ify milkymist_sysctl xiaoqiang zhao
2016-02-25 10:30 ` [Qemu-devel] [PATCH v5 6/8] hw/timer: QOM'ify puv3_ost xiaoqiang zhao
2016-02-25 10:30 ` [Qemu-devel] [PATCH v5 7/8] hw/timer: QOM'ify slavio_timer xiaoqiang zhao
2016-02-25 10:30 ` [Qemu-devel] [PATCH v5 8/8] hw/timer: QOM'ify grlib_gptimer xiaoqiang zhao
2016-02-25 10:53 ` [Qemu-devel] [PATCH v5 0/8] QOM'ify hw/timer/* Peter Maydell
2016-03-03 6:31 ` hitmoon
2016-03-16 2:26 ` hitmoon
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).