From: Alexander Graf <agraf@suse.de>
To: Laurent Vivier <lvivier@redhat.com>
Cc: dgibson@redhat.com, thuth@redhat.com, qemu-ppc@nongnu.org,
qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH] ppc64: set MSR_SF bit
Date: Wed, 16 Mar 2016 10:48:49 +0100 [thread overview]
Message-ID: <56E92C01.1030600@suse.de> (raw)
In-Reply-To: <1458121432-2855-1-git-send-email-lvivier@redhat.com>
On 16.03.16 10:43, Laurent Vivier wrote:
> When a qemu-system-ppc64 is started, the 64-bit mode bit
> is not set in MSR.
>
> Signed-off-by: Laurent Vivier <lvivier@redhat.com>
I guess commit 2cf3eb6df552cee74b52de9989e270b74e42847e broke this. I'm
surprised it didn't cause us more problems :).
Reviewed-by: Alexander Graf <agraf@suse.de>
> ---
> target-ppc/translate_init.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
> index bd0cffc..d7a1aeb 100644
> --- a/target-ppc/translate_init.c
> +++ b/target-ppc/translate_init.c
> @@ -9663,7 +9663,7 @@ static void ppc_cpu_reset(CPUState *s)
>
> #if defined(TARGET_PPC64)
> if (env->mmu_model & POWERPC_MMU_64) {
> - env->msr |= (1ULL << MSR_SF);
> + msr |= (1ULL << MSR_SF);
> }
> #endif
>
>
next prev parent reply other threads:[~2016-03-16 9:49 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-16 9:43 [Qemu-devel] [PATCH] ppc64: set MSR_SF bit Laurent Vivier
2016-03-16 9:48 ` Alexander Graf [this message]
2016-03-16 10:05 ` Laurent Vivier
2016-03-16 10:06 ` Alexander Graf
2016-03-16 10:30 ` Laurent Vivier
2016-03-16 10:32 ` Thomas Huth
2016-03-16 10:42 ` Alexander Graf
2016-03-21 1:28 ` [Qemu-devel] [Qemu-ppc] " David Gibson
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