From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41909) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ag84W-0000YB-Cg for qemu-devel@nongnu.org; Wed, 16 Mar 2016 05:49:00 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ag84S-0006Yq-BP for qemu-devel@nongnu.org; Wed, 16 Mar 2016 05:48:56 -0400 References: <1458121432-2855-1-git-send-email-lvivier@redhat.com> From: Alexander Graf Message-ID: <56E92C01.1030600@suse.de> Date: Wed, 16 Mar 2016 10:48:49 +0100 MIME-Version: 1.0 In-Reply-To: <1458121432-2855-1-git-send-email-lvivier@redhat.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] ppc64: set MSR_SF bit List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Laurent Vivier Cc: dgibson@redhat.com, thuth@redhat.com, qemu-ppc@nongnu.org, qemu-devel@nongnu.org On 16.03.16 10:43, Laurent Vivier wrote: > When a qemu-system-ppc64 is started, the 64-bit mode bit > is not set in MSR. > > Signed-off-by: Laurent Vivier I guess commit 2cf3eb6df552cee74b52de9989e270b74e42847e broke this. I'm surprised it didn't cause us more problems :). Reviewed-by: Alexander Graf > --- > target-ppc/translate_init.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c > index bd0cffc..d7a1aeb 100644 > --- a/target-ppc/translate_init.c > +++ b/target-ppc/translate_init.c > @@ -9663,7 +9663,7 @@ static void ppc_cpu_reset(CPUState *s) > > #if defined(TARGET_PPC64) > if (env->mmu_model & POWERPC_MMU_64) { > - env->msr |= (1ULL << MSR_SF); > + msr |= (1ULL << MSR_SF); > } > #endif > >