From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35532) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1akQ9c-0007Ui-Pt for qemu-devel@nongnu.org; Mon, 28 Mar 2016 01:55:57 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1akQ9Y-0004wN-0f for qemu-devel@nongnu.org; Mon, 28 Mar 2016 01:55:56 -0400 Received: from mail-wm0-x244.google.com ([2a00:1450:400c:c09::244]:33705) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1akQ9X-0004wD-PF for qemu-devel@nongnu.org; Mon, 28 Mar 2016 01:55:51 -0400 Received: by mail-wm0-x244.google.com with SMTP id 77so7109387wmi.0 for ; Sun, 27 Mar 2016 22:55:51 -0700 (PDT) References: <1458888577-12477-1-git-send-email-caoj.fnst@cn.fujitsu.com> From: Marcel Apfelbaum Message-ID: <56F8C761.4020203@gmail.com> Date: Mon, 28 Mar 2016 08:55:45 +0300 MIME-Version: 1.0 In-Reply-To: <1458888577-12477-1-git-send-email-caoj.fnst@cn.fujitsu.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] pci_register_bar: cleanup Reply-To: marcel@redhat.com List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Cao jin , qemu-devel@nongnu.org Cc: mst@redhat.com On 03/25/2016 09:49 AM, Cao jin wrote: > place relevant code tegother, make the code easier to read /s/tegother/together Since is already reviewed, maybe the maintainer can fix this. Thanks, Marcel > > Signed-off-by: Cao jin > --- > hw/pci/pci.c | 16 ++++++++-------- > 1 file changed, 8 insertions(+), 8 deletions(-) > > diff --git a/hw/pci/pci.c b/hw/pci/pci.c > index e67664d..f0f41dc 100644 > --- a/hw/pci/pci.c > +++ b/hw/pci/pci.c > @@ -974,7 +974,7 @@ void pci_register_bar(PCIDevice *pci_dev, int region_num, > uint8_t type, MemoryRegion *memory) > { > PCIIORegion *r; > - uint32_t addr; > + uint32_t addr; /* offset in pci config space */ > uint64_t wmask; > pcibus_t size = memory_region_size(memory); > > @@ -990,15 +990,20 @@ void pci_register_bar(PCIDevice *pci_dev, int region_num, > r->addr = PCI_BAR_UNMAPPED; > r->size = size; > r->type = type; > - r->memory = NULL; > + r->memory = memory; > + r->address_space = type & PCI_BASE_ADDRESS_SPACE_IO > + ? pci_dev->bus->address_space_io > + : pci_dev->bus->address_space_mem; > > wmask = ~(size - 1); > - addr = pci_bar(pci_dev, region_num); > if (region_num == PCI_ROM_SLOT) { > /* ROM enable bit is writable */ > wmask |= PCI_ROM_ADDRESS_ENABLE; > } > + > + addr = pci_bar(pci_dev, region_num); > pci_set_long(pci_dev->config + addr, type); > + > if (!(r->type & PCI_BASE_ADDRESS_SPACE_IO) && > r->type & PCI_BASE_ADDRESS_MEM_TYPE_64) { > pci_set_quad(pci_dev->wmask + addr, wmask); > @@ -1007,11 +1012,6 @@ void pci_register_bar(PCIDevice *pci_dev, int region_num, > pci_set_long(pci_dev->wmask + addr, wmask & 0xffffffff); > pci_set_long(pci_dev->cmask + addr, 0xffffffff); > } > - pci_dev->io_regions[region_num].memory = memory; > - pci_dev->io_regions[region_num].address_space > - = type & PCI_BASE_ADDRESS_SPACE_IO > - ? pci_dev->bus->address_space_io > - : pci_dev->bus->address_space_mem; > } > > static void pci_update_vga(PCIDevice *pci_dev) >