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From: "Cédric Le Goater" <clg@fr.ibm.com>
To: Greg Kurz <gkurz@linux.vnet.ibm.com>
Cc: Thomas Huth <thuth@redhat.com>,
	qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
	David Gibson <david@gibson.dropbear.id.au>
Subject: Re: [Qemu-devel] [Qemu-ppc] [PATCH] spapr: compute interrupt vector address from LPCR
Date: Tue, 29 Mar 2016 09:13:42 +0200	[thread overview]
Message-ID: <56FA2B26.9020100@fr.ibm.com> (raw)
In-Reply-To: <20160325124510.43fe7d41@bahia.huguette.org>

On 03/25/2016 12:45 PM, Greg Kurz wrote:
> Hi Cedric,
> 
> On Thu, 24 Mar 2016 16:28:53 +0100
> Cédric Le Goater <clg@fr.ibm.com> wrote:
> 
>> This address is changed by the linux kernel using the H_SET_MODE hcall
>> and needs to be migrated in order to restart a spapr VM running in
>> TCG. This can be done using the AIL bits from the LPCR register.
>>
>> The patch introduces a spapr_h_set_mode_resource_addr() helper to
>> share some code with the H_SET_MODE hcall.
>>
>> Signed-off-by: Cédric Le Goater <clg@fr.ibm.com>
>> ---
>>  hw/ppc/spapr.c         |   21 +++++++++++++++++++++
>>  hw/ppc/spapr_hcall.c   |   13 ++-----------
>>  include/hw/ppc/spapr.h |   14 ++++++++++++++
>>  3 files changed, 37 insertions(+), 11 deletions(-)
>>
>> Index: qemu-dgibson-for-2.6.git/hw/ppc/spapr.c
>> ===================================================================
>> --- qemu-dgibson-for-2.6.git.orig/hw/ppc/spapr.c
>> +++ qemu-dgibson-for-2.6.git/hw/ppc/spapr.c
>> @@ -1244,6 +1244,24 @@ static bool spapr_vga_init(PCIBus *pci_b
>>      }
>>  }
>>
>> +static int load_excp_prefix(void)
>> +{
>> +    CPUState *cs;
>> +
>> +    CPU_FOREACH(cs) {
>> +        CPUPPCState *env = &POWERPC_CPU(cs)->env;
> 
> And how are we sure env contains the migrated register values ?
> 
> Actually, this "works" because vmstate_ppc_cpu is registered before vmstate_spapr,
> and the same ordering happens to be used when sending state over the wire, but it
> looks wrong.
> 
> The excp_prefix should be restored in cpu_post_load(), unless I'm missing
> something.

ah yes. You're right. It was there initially but as this is specific spar, 
I moved the code out. Bad choice.

Thanks,

C. 

> Cheers.
> 
> --
> Greg
> 
>> +        int ail = (env->spr[SPR_LPCR] & LPCR_AIL) >> LPCR_AIL_SHIFT;
>> +
>> +        env->excp_prefix = spapr_h_set_mode_resource_addr(ail);
>> +        if (env->excp_prefix == H_UNSUPPORTED_FLAG) {
>> +            error_report("LPCR has an invalid AIL value");
>> +            return -EINVAL;
>> +        }
>> +    }
>> +
>> +    return 0;
>> +}
>> +
>>  static int spapr_post_load(void *opaque, int version_id)
>>  {
>>      sPAPRMachineState *spapr = (sPAPRMachineState *)opaque;
>> @@ -1257,6 +1275,9 @@ static int spapr_post_load(void *opaque,
>>          err = spapr_rtc_import_offset(spapr->rtc, spapr->rtc_offset);
>>      }
>>
>> +    if (!err) {
>> +        err = load_excp_prefix();
>> +    }
>>      return err;
>>  }
>>
>> Index: qemu-dgibson-for-2.6.git/include/hw/ppc/spapr.h
>> ===================================================================
>> --- qemu-dgibson-for-2.6.git.orig/include/hw/ppc/spapr.h
>> +++ qemu-dgibson-for-2.6.git/include/hw/ppc/spapr.h
>> @@ -561,6 +561,20 @@ struct sPAPREventLogEntry {
>>      QTAILQ_ENTRY(sPAPREventLogEntry) next;
>>  };
>>
>> +static inline target_ulong spapr_h_set_mode_resource_addr(target_ulong mflags)
>> +{
>> +    switch (mflags) {
>> +    case H_SET_MODE_ADDR_TRANS_NONE:
>> +        return 0;
>> +    case H_SET_MODE_ADDR_TRANS_0001_8000:
>> +        return 0x18000;
>> +    case H_SET_MODE_ADDR_TRANS_C000_0000_0000_4000:
>> +        return 0xC000000000004000ULL;
>> +    default:
>> +        return H_UNSUPPORTED_FLAG;
>> +    }
>> +}
>> +
>>  void spapr_events_init(sPAPRMachineState *sm);
>>  void spapr_events_fdt_skel(void *fdt, uint32_t epow_irq);
>>  int spapr_h_cas_compose_response(sPAPRMachineState *sm,
>> Index: qemu-dgibson-for-2.6.git/hw/ppc/spapr_hcall.c
>> ===================================================================
>> --- qemu-dgibson-for-2.6.git.orig/hw/ppc/spapr_hcall.c
>> +++ qemu-dgibson-for-2.6.git/hw/ppc/spapr_hcall.c
>> @@ -835,17 +835,8 @@ static target_ulong h_set_mode_resource_
>>          return H_P4;
>>      }
>>
>> -    switch (mflags) {
>> -    case H_SET_MODE_ADDR_TRANS_NONE:
>> -        prefix = 0;
>> -        break;
>> -    case H_SET_MODE_ADDR_TRANS_0001_8000:
>> -        prefix = 0x18000;
>> -        break;
>> -    case H_SET_MODE_ADDR_TRANS_C000_0000_0000_4000:
>> -        prefix = 0xC000000000004000ULL;
>> -        break;
>> -    default:
>> +    prefix = spapr_h_set_mode_resource_addr(mflags);
>> +    if (prefix == H_UNSUPPORTED_FLAG) {
>>          return H_UNSUPPORTED_FLAG;
>>      }
>>
>>
>>
> 

  reply	other threads:[~2016-03-29  7:14 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-03-24 15:28 [Qemu-devel] [PATCH] spapr: compute interrupt vector address from LPCR Cédric Le Goater
2016-03-25 11:45 ` [Qemu-devel] [Qemu-ppc] " Greg Kurz
2016-03-29  7:13   ` Cédric Le Goater [this message]
2016-03-29  4:35 ` [Qemu-devel] " David Gibson

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