From: Paolo Bonzini <pbonzini@redhat.com>
To: Peter Lieven <pl@kamp.de>
Cc: qemu-devel@nongnu.org, Laszlo Ersek <lersek@redhat.com>,
Michael Roth <mdroth@linux.vnet.ibm.com>,
ehabkost@redhat.com, qemu-stable@nongnu.org
Subject: Re: [Qemu-devel] [Qemu-stable] [PATCH] target-i386: do not read/write MSR_TSC_AUX from KVM if CPUID bit is not set
Date: Thu, 31 Mar 2016 18:52:11 +0200 [thread overview]
Message-ID: <56FD55BB.2010903@redhat.com> (raw)
In-Reply-To: <6DB6C7C1-2FDB-4478-A2EA-5A71CC3A47A3@kamp.de>
On 31/03/2016 17:38, Peter Lieven wrote:
>
>
>> Am 31.03.2016 um 15:23 schrieb Paolo Bonzini <pbonzini@redhat.com>:
>>
>>
>>
>>> On 31/03/2016 15:12, Peter Lieven wrote:
>>>>>
>>>>> KVM does not let you read or write this MSR if the corresponding CPUID
>>>>> bit is not set. This in turn causes MSRs that come after MSR_TSC_AUX
>>>>> to be ignored by KVM_SET_MRSS.
>>>
>>> Is it possible that this causes a freeze when migrating vom qemu 2.2.0
>>> to 2.5.1?
>>
>> I wouldn't exclude it if the CPU model is Westmere or earlier.
>
> the Host CPU or the Emulated CPU?
The guest.
Paolo
> We emulate Westmere and have also some old blades with Westmere CPUs.
>
> anyway, i give this a try.
>
> Michael, this should have gone into 2.5.1 i think...
>
> Thanks,
> Peter
>
>
next prev parent reply other threads:[~2016-03-31 16:52 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-30 20:59 [Qemu-devel] [PATCH] target-i386: do not read/write MSR_TSC_AUX from KVM if CPUID bit is not set Paolo Bonzini
2016-03-31 12:56 ` Laszlo Ersek
2016-03-31 13:12 ` [Qemu-devel] [Qemu-stable] " Peter Lieven
2016-03-31 13:23 ` Paolo Bonzini
2016-03-31 15:38 ` Peter Lieven
2016-03-31 16:52 ` Paolo Bonzini [this message]
2016-03-31 19:21 ` Peter Lieven
2016-03-31 16:26 ` [Qemu-devel] " Eduardo Habkost
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