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Tue, 7 Jun 2022 08:41:13 +0000 (GMT) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 24F8011C058; Tue, 7 Jun 2022 08:41:13 +0000 (GMT) Received: from [9.171.53.11] (unknown [9.171.53.11]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Tue, 7 Jun 2022 08:41:12 +0000 (GMT) Message-ID: <56bf8c09-9831-a4f3-1eb0-61a6e55841a8@linux.ibm.com> Date: Tue, 7 Jun 2022 10:41:12 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.0 Subject: Re: [PATCH v2 08/16] ppc/pnv: user created pnv-phb for powernv9 Content-Language: en-US To: Daniel Henrique Barboza , qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au, clg@kaod.org, mark.cave-ayland@ilande.co.uk References: <20220531214917.31668-1-danielhb413@gmail.com> <20220531214917.31668-9-danielhb413@gmail.com> From: Frederic Barrat In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-TM-AS-GCONF: 00 X-Proofpoint-GUID: QwIAGoqH0LAadsStydHIJHQcinMqdQ33 X-Proofpoint-ORIG-GUID: AYrL48-zCYHaPCRMLMrRBYdgFUtqz1zJ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.874,Hydra:6.0.517,FMLib:17.11.64.514 definitions=2022-06-07_02,2022-06-03_01,2022-02-23_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 bulkscore=0 lowpriorityscore=0 impostorscore=0 malwarescore=0 phishscore=0 adultscore=0 spamscore=0 mlxscore=0 mlxlogscore=999 suspectscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2204290000 definitions=main-2206070035 Received-SPF: pass client-ip=148.163.158.5; envelope-from=fbarrat@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -19 X-Spam_score: -2.0 X-Spam_bar: -- X-Spam_report: (-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 03/06/2022 23:00, Daniel Henrique Barboza wrote: >>>   static void pnv_phb4_realize(DeviceState *dev, Error **errp) >>>   { >>>       PnvPHB4 *phb = PNV_PHB4(dev); >>> +    PnvMachineState *pnv = PNV_MACHINE(qdev_get_machine()); >>> +    PnvChip *chip = pnv_get_chip(pnv, phb->chip_id); >>>       XiveSource *xsrc = &phb->xsrc; >>> +    BusState *s; >>> +    Error *local_err = NULL; >>>       int nr_irqs; >>>       char name[32]; >>> +    if (!chip) { >>> +        error_setg(errp, "invalid chip id: %d", phb->chip_id); >>> +        return; >>> +    } >>> + >>> +    /* User created PHBs need to be assigned to a PEC */ >>> +    if (!phb->pec) { >>> +        phb->pec = pnv_phb4_get_pec(chip, phb, &local_err); >>> +        if (local_err) { >>> +            error_propagate(errp, local_err); >>> +            return; >>> +        } >>> +    } >>> + >>> +    /* Reparent the PHB to the chip to build the device tree */ >>> +    pnv_chip_parent_fixup(chip, OBJECT(phb->phb_base), phb->phb_id); >> >> >> Didn't you mean to do that only for the user-created case? > > It's done for both because the default generated PHBs are being created > loosely > from the chip starting on 3f4c369ea63e ("ppc/pnv: make PECs create and > realize > PHB4s"). We had to amend the code after that commit to fix the QOM > hierarchy > of these devices. 6e7b96750359 ("ppc/pnv: fix default PHB4 QOM > hierarchy") has > more details. > > >> And why not attaching the PHB to the PEC instead of the chip, like in >> pnv_pec_default_phb_realize() ? I think it makes more sense to keep >> the chip->PEC->PHB parenting in the qom tree (and incidentally, that's >> where I'd prefer to have the phb3 model move to). > > I can only speculate since I didn't participate in the initial design. My > educated guess is that we didn't want to show PECs in qtree, hence we > made the PHB a child of the chip instead. I'll also guess that this can be > due to how PHB3 worked and we just copied the existing design. I don't believe that's correct though. As Cedric replied, the PECs show up in the qom tree on P9/P10, with chip->PEC->PHB, in that order. And I think that's fine, that's the model we should tend to (and which would require a fix on P8, since there we have chip->phb->pbcq, which is backwards. The pbcq object is the equivalent of the PEC). So I think we should keep the qom relationship as it currently is on P9/P10, since it looks good. On P8, we can keep the current status for now and, as discussed privately, have another series later to clean things up. Fred