From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Subject: Re: [PATCH v2 33/36] tcg/tci: Add TCG_TARGET_CALL_{RET,ARG}_I128
Date: Fri, 21 Oct 2022 12:47:30 +0200 [thread overview]
Message-ID: <56c357ca-c481-5a69-6bc2-5579c0bf4503@linaro.org> (raw)
In-Reply-To: <20221021071549.2398137-34-richard.henderson@linaro.org>
On 21/10/22 09:15, Richard Henderson wrote:
> Fill in the parameters for libffi for Int128.
> Adjust the interpreter to allow for 16-byte return values.
> Adjust tcg_out_call to record the return value length.
>
> Call parameters are no longer all the same size, so we
> cannot reuse the same call_slots array for every function.
> Compute it each time now, but only fill in slots required
> for the call we're about to make.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> tcg/tci/tcg-target.h | 3 +++
> tcg/tcg.c | 18 ++++++++++++++++
> tcg/tci.c | 45 ++++++++++++++++++++--------------------
> tcg/tci/tcg-target.c.inc | 8 +++----
> 4 files changed, 48 insertions(+), 26 deletions(-)
> static ffi_type *typecode_to_ffi(int argmask)
> {
> + /*
> + * libffi does not support __int128_t, so we have forced Int128
> + * to use the structure definition instead of the builtin type.
> + */
> + static ffi_type *ffi_type_i128_elements[3] = {
static const.
> + &ffi_type_uint64,
> + &ffi_type_uint64,
> + NULL
> + };
> + static ffi_type ffi_type_i128 = {
static const.
> + .size = 16,
> + .alignment = __alignof__(Int128),
> + .type = FFI_TYPE_STRUCT,
> + .elements = ffi_type_i128_elements,
> + };
> @@ -499,26 +496,27 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState *env,
>
> switch (opc) {
> case INDEX_op_call:
> - /*
> - * Set up the ffi_avalue array once, delayed until now
> - * because many TB's do not make any calls. In tcg_gen_callN,
> - * we arranged for every real argument to be "left-aligned"
> - * in each 64-bit slot.
> - */
> - if (unlikely(call_slots[0] == NULL)) {
> - for (int i = 0; i < ARRAY_SIZE(call_slots); ++i) {
> - call_slots[i] = &stack[i];
> - }
> - }
> -
> - tci_args_nl(insn, tb_ptr, &len, &ptr);
> -
> - /* Helper functions may need to access the "return address" */
> - tci_tb_ptr = (uintptr_t)tb_ptr;
> -
> {
> - void **pptr = ptr;
> - ffi_call(pptr[1], pptr[0], stack, call_slots);
> + void *call_slots[MAX_OPC_PARAM_IARGS];
> + ffi_cif *cif;
> + void *func;
> + unsigned i, s, n;
> +
> + tci_args_nl(insn, tb_ptr, &len, &ptr);
> + func = ((void **)ptr)[0];
> + cif = ((void **)ptr)[1];
> +
> + n = cif->nargs;
> + tci_assert(n <= MAX_OPC_PARAM_IARGS);
> + for (i = s = 0; i < n; ++i) {
> + ffi_type *t = cif->arg_types[i];
> + call_slots[i] = &stack[s];
> + s += DIV_ROUND_UP(t->size, 8);
> + }
> +
> + /* Helper functions may need to access the "return address" */
> + tci_tb_ptr = (uintptr_t)tb_ptr;
> + ffi_call(cif, func, stack, call_slots);
> }
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
next prev parent reply other threads:[~2022-10-21 10:49 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-21 7:15 [PATCH v2 00/36] tcg: Support for Int128 with helpers Richard Henderson
2022-10-21 7:15 ` [PATCH v2 01/36] include/qemu/atomic128: Support 16-byte atomic read/write for Intel AVX Richard Henderson
2022-10-21 7:15 ` [PATCH v2 02/36] tcg: Tidy tcg_reg_alloc_op Richard Henderson
2022-10-25 15:26 ` Philippe Mathieu-Daudé
2022-10-21 7:15 ` [PATCH v2 03/36] tcg: Introduce paired register allocation Richard Henderson
2022-10-21 7:15 ` [PATCH v2 04/36] tcg/s390x: Use register pair allocation for div and mulu2 Richard Henderson
2022-10-21 7:15 ` [PATCH v2 05/36] tcg/arm: Use register pair allocation for qemu_{ld, st}_i64 Richard Henderson
2022-10-21 7:15 ` [PATCH v2 06/36] meson: Move CONFIG_TCG_INTERPRETER to config_host Richard Henderson
2022-10-21 7:15 ` [PATCH v2 07/36] tcg: Remove TCG_TARGET_STACK_GROWSUP Richard Henderson
2022-10-21 7:15 ` [PATCH v2 08/36] accel/tcg: Set cflags_next_tb in cpu_common_initfn Richard Henderson
2022-10-21 7:15 ` [PATCH v2 09/36] target/sparc: Avoid TCGV_{LOW,HIGH} Richard Henderson
2022-10-21 7:15 ` [PATCH v2 10/36] tcg: Move TCG_{LOW,HIGH} to tcg-internal.h Richard Henderson
2022-10-21 7:15 ` [PATCH v2 11/36] tcg: Add temp_subindex to TCGTemp Richard Henderson
2022-10-21 7:15 ` [PATCH v2 12/36] tcg: Simplify calls to temp_sync vs mem_coherent Richard Henderson
2022-10-21 7:15 ` [PATCH v2 13/36] tcg: Allocate TCGTemp pairs in host memory order Richard Henderson
2022-10-21 7:15 ` [PATCH v2 14/36] tcg: Move TCG_TYPE_COUNT outside enum Richard Henderson
2022-10-21 7:15 ` [PATCH v2 15/36] tcg: Introduce tcg_type_size Richard Henderson
2022-10-21 7:15 ` [PATCH v2 16/36] tcg: Introduce TCGCallReturnKind and TCGCallArgumentKind Richard Henderson
2022-10-21 7:15 ` [PATCH v2 17/36] tcg: Replace TCG_TARGET_CALL_ALIGN_ARGS with TCG_TARGET_CALL_ARG_I64 Richard Henderson
2022-10-21 10:28 ` Philippe Mathieu-Daudé
2022-10-21 7:15 ` [PATCH v2 18/36] tcg: Replace TCG_TARGET_EXTEND_ARGS with TCG_TARGET_CALL_ARG_I32 Richard Henderson
2022-10-21 10:33 ` Philippe Mathieu-Daudé
2022-10-21 7:15 ` [PATCH v2 19/36] tcg: Use TCG_CALL_ARG_EVEN for TCI special case Richard Henderson
2022-10-25 20:14 ` Ilya Leoshkevich
2022-10-21 7:15 ` [PATCH v2 20/36] tcg: Reorg function calls Richard Henderson
2022-10-21 7:15 ` [PATCH v2 21/36] tcg: Move ffi_cif pointer into TCGHelperInfo Richard Henderson
2022-10-21 7:15 ` [PATCH v2 22/36] tcg: Add TCGHelperInfo argument to tcg_out_call Richard Henderson
2022-10-21 7:15 ` [PATCH v2 23/36] tcg: Define TCG_TYPE_I128 and related helper macros Richard Henderson
2022-10-21 7:15 ` [PATCH v2 24/36] tcg: Add TCG_CALL_{RET,ARG}_NORMAL_4 Richard Henderson
2022-10-21 7:15 ` [PATCH v2 25/36] tcg: Allocate objects contiguously in temp_allocate_frame Richard Henderson
2022-10-21 7:15 ` [PATCH v2 26/36] tcg: Introduce tcg_out_addi_ptr Richard Henderson
2022-10-21 7:15 ` [PATCH v2 27/36] tcg: Add TCG_CALL_{RET,ARG}_BY_REF Richard Henderson
2022-10-21 7:15 ` [PATCH v2 28/36] tcg: Introduce tcg_target_call_oarg_reg Richard Henderson
2022-10-21 7:15 ` [PATCH v2 29/36] tcg: Add TCG_CALL_RET_BY_VEC Richard Henderson
2022-10-21 7:15 ` [PATCH v2 30/36] include/qemu/int128: Use Int128 structure for TCI Richard Henderson
2022-10-21 7:15 ` [PATCH v2 31/36] tcg/i386: Add TCG_TARGET_CALL_{RET,ARG}_I128 Richard Henderson
2022-10-21 7:15 ` [PATCH v2 32/36] tcg/tci: Fix big-endian return register ordering Richard Henderson
2022-10-21 7:15 ` [PATCH v2 33/36] tcg/tci: Add TCG_TARGET_CALL_{RET,ARG}_I128 Richard Henderson
2022-10-21 10:47 ` Philippe Mathieu-Daudé [this message]
2022-10-22 3:48 ` Richard Henderson
2022-10-21 7:15 ` [PATCH v2 34/36] tcg: " Richard Henderson
2022-10-21 7:15 ` [PATCH v2 35/36] tcg: Add temp allocation for TCGv_i128 Richard Henderson
2022-10-21 7:15 ` [PATCH v2 36/36] tcg: Add tcg_gen_extr_i128_i64, tcg_gen_concat_i64_i128 Richard Henderson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=56c357ca-c481-5a69-6bc2-5579c0bf4503@linaro.org \
--to=philmd@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).