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From: Leon Alrae <leon.alrae@imgtec.com>
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Date: Mon, 4 Apr 2016 17:10:24 +0100
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Subject: Re: [Qemu-devel] [PATCH 1/2] softfloat: Enable
 run-time-configurable meaning of signaling NaN bit
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To: Aleksandar Markovic <Aleksandar.Markovic@imgtec.com>, Aleksandar Markovic <aleksandar.markovic@rt-rk.com>, "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
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On 03/04/16 15:25, Aleksandar Markovic wrote:
> It just seems to me that, in similar case, 16-bit default NaN value sho=
uld be 0x7E00. This value is needed for MSA operations. ("MIPS Architectu=
re for Programmers Volume IV-j: The MIPS32=AE SIMD Architecture Module", =
Revision 1.12, (february 3, 2016), page 52, table 3.7 "Default NaN Encodi=
ngs")
>=20
> I plan to include all three corrections in the next version of this pat=
ch set. Please, let me know if you think that I should not.

Great, thanks.

Also, the pickNaNMulAdd() for MIPS requires updating to match "3.5.3 NaN
Propagation" from the same MSA doc:
"When two or three operands are NaN, the payload of the resulting NaN is
identical to the payload of one of the input NaNs selected from left to
right as described by the instruction format".
This indicates the "c, a, b" order instead of "a, b, c" which is
currently implemented.

Regards,
Leon