From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46874) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aovGs-0000Jv-P6 for qemu-devel@nongnu.org; Sat, 09 Apr 2016 11:58:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1aovGp-0001nl-HG for qemu-devel@nongnu.org; Sat, 09 Apr 2016 11:58:02 -0400 Received: from mail-pf0-x235.google.com ([2607:f8b0:400e:c00::235]:36183) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1aovGp-0001nf-Af for qemu-devel@nongnu.org; Sat, 09 Apr 2016 11:57:59 -0400 Received: by mail-pf0-x235.google.com with SMTP id e128so94364256pfe.3 for ; Sat, 09 Apr 2016 08:57:59 -0700 (PDT) Sender: Richard Henderson References: <57029630.3070300@twiddle.net> <5702AACF.90306@twiddle.net> <1460136006.50712.3.camel@TomH-Z-Workstation> <5707F422.1090100@twiddle.net> From: Richard Henderson Message-ID: <57092683.5040405@twiddle.net> Date: Sat, 9 Apr 2016 08:57:55 -0700 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] best way to implement emulation of AArch64 tagged addresses List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Thomas Hanson Cc: Peter Maydell , QEMU Developers On 04/08/2016 05:29 PM, Thomas Hanson wrote: > Looking at tcg_out_tlb_load(): > If I'm reading the pseudo-assembler of the function names correctly, it looks > like in the i386 code we're already masking the address being checked: > tgen_arithi(s, ARITH_AND + trexw, r1, TARGET_PAGE_MASK | (aligned ? s_mask > : 0), 0); > where TARGET_PAGE_MASK is a simple all-1's mask in the appropriate upper bits. > > Can we just poke some 0's into that mask in the tag locations? No, because we'd no longer have a sign-extended 32-bit value, as fits in that immediate operand field. To load the constant you're asking for, we'd need a 64-bit move insn and another register. r~