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Tsirkin" , Alexander Graf , qemu-arm@nongnu.org, Peter Maydell , Marcel Apfelbaum , Yanan Wang , Richard Henderson , Cameron Esfahani , Paolo Bonzini , =?UTF-8?Q?Marc-Andr=C3=A9_Lureau?= References: <20250804142326.72947-1-mohamed@unpredictable.fr> From: Pierrick Bouvier In-Reply-To: <20250804142326.72947-1-mohamed@unpredictable.fr> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::62c; envelope-from=pierrick.bouvier@linaro.org; helo=mail-pl1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 8/4/25 7:23 AM, Mohamed Mediouni wrote: > Link to branch: https://github.com/mediouni-m/qemu whpx (tag for this submission: whpx-v3) > > Missing features: > - PSCI state sync with Hyper-V: notably breaks reboots when multiple cores are enabled > - Interrupt controller save-restore > - Debug register sync > - SVE register sync > - Adding a migration blocker because of the items above. > > Note: > > "accel/system: Introduce hwaccel_enabled() helper" taken from the mailing list, added here > as part of this series to make it compilable as a whole. > > "hw/arm: virt: add GICv2m for the case when ITS is not available" present in both the HVF > vGIC and this series. > > Updates since v3: > - Disabling SVE on WHPX > - Taking into account review comments incl: > > - fixing x86 support > - reduce the amount of __x86_64__ checks in common code to the minimum (winhvemulation) > which can be reduced even further down the road. > - generalize get_physical_address_range into something common between hvf and whpx > > Updates since v2: > - Fixed up a rebase screwup for whpx-internal.h > - Fixed ID_AA64ISAR1_EL1 and ID_AA64ISAR2_EL1 feature probe for -cpu host > - Switched to ID_AA64PFR1_EL1/ID_AA64DFR0_EL1 instead of their non-AA64 variant > > Updates since v1: > - Shutdowns and reboots > - MPIDR_EL1 register sync > - Fixing GICD_TYPER_LPIS value > - IPA size clamping > - -cpu host now implemented > > Mohamed Mediouni (16): > hw/arm: virt: add GICv2m for the case when ITS is not available > whpx: Move around files before introducing AArch64 support > whpx: reshuffle common code > whpx: ifdef out winhvemulation on non-x86_64 > whpx: common: add WHPX_INTERCEPT_DEBUG_TRAPS define > hw, target, accel: whpx: change apic_in_platform to kernel_irqchip > whpx: interrupt controller support > whpx: add arm64 support > whpx: copy over memory management logic from hvf > target/arm: cpu: mark WHPX as supporting PSCI 1.1 > hw/arm: virt: cleanly fail on attempt to use the platform vGIC > together with ITS > whpx: arm64: clamp down IPA size > hw/arm, accel/hvf, whpx: unify get_physical_address_range between WHPX > and HVF > whpx: arm64: implement -cpu host > target/arm: whpx: instantiate GIC early > MAINTAINERS: Add myself as a maintainer for WHPX > > Philippe Mathieu-Daudé (1): > accel/system: Introduce hwaccel_enabled() helper > > MAINTAINERS | 9 +- > accel/hvf/hvf-all.c | 7 +- > accel/meson.build | 1 + > accel/whpx/meson.build | 7 + > {target/i386 => accel}/whpx/whpx-accel-ops.c | 6 +- > accel/whpx/whpx-common.c | 666 +++++++++++ > hw/arm/virt-acpi-build.c | 4 +- > hw/arm/virt.c | 34 +- > hw/i386/x86-cpu.c | 4 +- > hw/intc/arm_gicv3_common.c | 3 + > hw/intc/arm_gicv3_whpx.c | 261 +++++ > hw/intc/meson.build | 1 + > include/hw/arm/virt.h | 2 + > include/hw/boards.h | 3 +- > include/hw/intc/arm_gicv3_common.h | 3 + > include/system/hvf_int.h | 2 + > include/system/hw_accel.h | 13 + > .../whpx => include/system}/whpx-accel-ops.h | 4 +- > include/system/whpx-all.h | 20 + > include/system/whpx-common.h | 26 + > .../whpx => include/system}/whpx-internal.h | 14 +- > include/system/whpx.h | 4 +- > meson.build | 21 +- > target/arm/cpu.c | 3 +- > target/arm/cpu64.c | 19 +- > target/arm/hvf-stub.c | 20 - > target/arm/hvf/hvf.c | 6 +- > target/arm/hvf_arm.h | 3 - > target/arm/meson.build | 2 +- > target/arm/whpx/meson.build | 5 + > target/arm/whpx/whpx-all.c | 1021 +++++++++++++++++ > target/arm/whpx/whpx-stub.c | 15 + > target/arm/whpx_arm.h | 17 + > target/i386/cpu-apic.c | 2 +- > target/i386/hvf/hvf.c | 10 + > target/i386/whpx/meson.build | 1 - > target/i386/whpx/whpx-all.c | 569 +-------- > target/i386/whpx/whpx-apic.c | 2 +- > 38 files changed, 2191 insertions(+), 619 deletions(-) > create mode 100644 accel/whpx/meson.build > rename {target/i386 => accel}/whpx/whpx-accel-ops.c (96%) > create mode 100644 accel/whpx/whpx-common.c > create mode 100644 hw/intc/arm_gicv3_whpx.c > rename {target/i386/whpx => include/system}/whpx-accel-ops.h (92%) > create mode 100644 include/system/whpx-all.h > create mode 100644 include/system/whpx-common.h > rename {target/i386/whpx => include/system}/whpx-internal.h (96%) > delete mode 100644 target/arm/hvf-stub.c > create mode 100644 target/arm/whpx/meson.build > create mode 100644 target/arm/whpx/whpx-all.c > create mode 100644 target/arm/whpx/whpx-stub.c > create mode 100644 target/arm/whpx_arm.h > For the whole series: Tested-by: Pierrick Bouvier Booting a linux guest (direct kernel boot + edk2): ./build/qemu-system-aarch64.exe \ -M virt,accel=whpx \ -m 2048 \ -cpu host \ -kernel out/Image.gz \ ./out/host.ext4 \ -nographic \ -append ' root=/dev/vda' Thanks, Pierrick