From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48799) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b2qRz-00055M-4Y for qemu-devel@nongnu.org; Tue, 17 May 2016 21:39:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b2lii-0007fH-D2 for qemu-devel@nongnu.org; Tue, 17 May 2016 16:36:03 -0400 Received: from mail-lb0-x242.google.com ([2a00:1450:4010:c04::242]:32850) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b2lih-0007eu-ID for qemu-devel@nongnu.org; Tue, 17 May 2016 16:36:00 -0400 Received: by mail-lb0-x242.google.com with SMTP id qf3so1658846lbb.0 for ; Tue, 17 May 2016 13:35:59 -0700 (PDT) References: <1463196873-17737-1-git-send-email-cota@braap.org> <1463196873-17737-8-git-send-email-cota@braap.org> <573B5134.8060104@gmail.com> <20160517193842.GB30174@flamenco> From: Sergey Fedorov Message-ID: <573B80AD.50503@gmail.com> Date: Tue, 17 May 2016 23:35:57 +0300 MIME-Version: 1.0 In-Reply-To: <20160517193842.GB30174@flamenco> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v5 07/18] qemu-thread: add simple test-and-set spinlock List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Emilio G. Cota" Cc: QEMU Developers , MTTCG Devel , =?UTF-8?Q?Alex_Benn=c3=a9e?= , Paolo Bonzini , Peter Crosthwaite , Richard Henderson On 17/05/16 22:38, Emilio G. Cota wrote: > On Tue, May 17, 2016 at 20:13:24 +0300, Sergey Fedorov wrote: >> On 14/05/16 06:34, Emilio G. Cota wrote: (snip) >>> + while (atomic_read(&spin->value)) { >>> + cpu_relax(); >>> + } >>> + } >> Looks like relaxed atomic access can be a subject to various >> optimisations according to >> https://gcc.gnu.org/wiki/Atomic/GCCMM/AtomicSync#Relaxed. > The important thing here is that the read actually happens > on every iteration; this is achieved with atomic_read(). > Barriers etc. do not matter here because once we exit > the loop, the try to acquire the lock -- and if we succeed, > we then emit the right barrier. I just can't find where it is stated that an expression like "__atomic_load(ptr, &_val, __ATOMIC_RELAXED)" has a _compiler_ barrier or volatile access semantic. Hopefully, cpu_relax() serves as a compiler barrier. If we rely on that, we'd better put a comment about it. Kind regards, Sergey >>> +static inline bool qemu_spin_locked(QemuSpin *spin) >>> +{ >>> + return atomic_read_acquire(&spin->value); >> Why not just atomic_read()? > I think atomic_read() is better, yes. I'll change it. I went > with the fence because I wanted to have at least a caller > of atomic_read_acquire :P > > I also hesitated between calling it _locked or _is_locked; > I used _locked for consistency with qemu_mutex_iothread_locked, > although I think _is_locked is a bit clearer: > qemu_spin_locked(foo) > is a little too similar to > qemu_spin_lock(foo). > > Thanks, > > Emilio