From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49403) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b332F-0006i2-As for qemu-devel@nongnu.org; Wed, 18 May 2016 11:05:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b332B-0003xG-1h for qemu-devel@nongnu.org; Wed, 18 May 2016 11:05:18 -0400 Received: from mail-lf0-x242.google.com ([2a00:1450:4010:c07::242]:36327) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b332A-0003x3-Fn for qemu-devel@nongnu.org; Wed, 18 May 2016 11:05:14 -0400 Received: by mail-lf0-x242.google.com with SMTP id y84so3420152lfc.3 for ; Wed, 18 May 2016 08:05:14 -0700 (PDT) References: <1463196873-17737-1-git-send-email-cota@braap.org> <1463196873-17737-8-git-send-email-cota@braap.org> <573B5134.8060104@gmail.com> <66d14198-dab0-c72e-fe17-d022cff3feff@twiddle.net> <20160517200415.GD30174@flamenco> <573B7CFB.30002@gmail.com> <20160518002814.GA25803@flamenco> <573C79CA.3010703@gmail.com> <573C807D.7050505@gmail.com> <0da2faf1-4d51-3bda-cc2b-81dfac485b80@redhat.com> From: Sergey Fedorov Message-ID: <573C84A7.6000707@gmail.com> Date: Wed, 18 May 2016 18:05:11 +0300 MIME-Version: 1.0 In-Reply-To: <0da2faf1-4d51-3bda-cc2b-81dfac485b80@redhat.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v5 07/18] qemu-thread: add simple test-and-set spinlock List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paolo Bonzini , "Emilio G. Cota" Cc: Richard Henderson , QEMU Developers , MTTCG Devel , =?UTF-8?Q?Alex_Benn=c3=a9e?= , Peter Crosthwaite On 18/05/16 17:59, Paolo Bonzini wrote: > > On 18/05/2016 16:47, Sergey Fedorov wrote: >>>>>> Why not? AFAIK the reason to avoid __sync primitives is that in most cases >>>>>> they include barriers that callers might not necessarily need; __atomic's >>>>>> allow for finer tuning, which is in general a good thing. However, >>>>>> __sync_test_and_set has the exact semantics we need, without the limitations >>>>>> documented for __atomic_test_and_set; so why not use it? >>>> So it should be okay as long as the legacy build-ins are supported. >> However, there's also __atomic_compare_exchange_n(). Could it be the choice? > cmpxchg is not TAS. I don't see any reason not to use > __sync_test_and_set, the only sensible alternative is to ignore the > standard and use __atomic_test_and_set on int. Please look at this: $ cat >a.c <: 0: e1902f9f ldrex r2, [r0] 4: e1803f91 strex r3, r1, [r0] 8: e3530000 cmp r3, #0 c: 1afffffb bne 0 10: ee070fba mcr 15, 0, r0, cr7, cr10, {5} 14: e1a00002 mov r0, r2 18: e12fff1e bx lr 0000001c : 1c: e24dd008 sub sp, sp, #8 20: e58d1004 str r1, [sp, #4] 24: e1903f9f ldrex r3, [r0] 28: e1530001 cmp r3, r1 2c: 1a000002 bne 3c 30: e180cf92 strex ip, r2, [r0] 34: e35c0000 cmp ip, #0 38: ee070fba mcr 15, 0, r0, cr7, cr10, {5} 3c: 13a00000 movne r0, #0 40: 03a00001 moveq r0, #1 44: e28dd008 add sp, sp, #8 48: e12fff1e bx lr 0000004c : 4c: ee070fba mcr 15, 0, r0, cr7, cr10, {5} 50: e1901f9f ldrex r1, [r0] 54: e3510000 cmp r1, #0 58: 1a000002 bne 68 5c: e1803f92 strex r3, r2, [r0] 60: e3530000 cmp r3, #0 64: 1afffff9 bne 50 68: e2910000 adds r0, r1, #0 6c: ee070fba mcr 15, 0, r0, cr7, cr10, {5} 70: 13a00001 movne r0, #1 74: e12fff1e bx lr 00000078 : 78: e1902f9f ldrex r2, [r0] 7c: e1803f91 strex r3, r1, [r0] 80: e3530000 cmp r3, #0 84: 1afffffb bne 78 88: ee070fba mcr 15, 0, r0, cr7, cr10, {5} 8c: e12fff1e bx lr atomic_compare_exchange() looks pretty good, doesn't it? Could we use it to implement qemu_spin_lock()? Kind regards, Sergey