From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39206) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b5IeO-0007is-CX for qemu-devel@nongnu.org; Tue, 24 May 2016 16:10:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b5IeI-0005n0-9C for qemu-devel@nongnu.org; Tue, 24 May 2016 16:09:59 -0400 Received: from mail-lb0-x244.google.com ([2a00:1450:4010:c04::244]:34213) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b5IeI-0005me-14 for qemu-devel@nongnu.org; Tue, 24 May 2016 16:09:54 -0400 Received: by mail-lb0-x244.google.com with SMTP id t6so1592897lbv.1 for ; Tue, 24 May 2016 13:09:53 -0700 (PDT) References: <1464120374-8950-1-git-send-email-cota@braap.org> <1464120374-8950-3-git-send-email-cota@braap.org> From: Sergey Fedorov Message-ID: <5744B50B.5040001@gmail.com> Date: Tue, 24 May 2016 23:09:47 +0300 MIME-Version: 1.0 In-Reply-To: <1464120374-8950-3-git-send-email-cota@braap.org> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v2 2/3] atomics: emit an smp_read_barrier_depends() barrier only for Sparc and Thread Sanitizer List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Emilio G. Cota" , QEMU Developers , MTTCG Devel Cc: =?UTF-8?Q?Alex_Benn=c3=a9e?= , Paolo Bonzini , Richard Henderson On 24/05/16 23:06, Emilio G. Cota wrote: > For correctness, smp_read_barrier_depends() is only required to > emit a barrier on Sparc hosts. However, we are currently emitting > a consume fence unconditionally. > > Fix it by keeping the consume fence if we're compiling with Thread > Sanitizer, since this might help prevent false warnings. Otherwise, > only emit the barrier for Sparc hosts. Note that we still guarantee > that smp_read_barrier_depends() is a compiler barrier. s/Sparc/Alpha/? Regards, Sergey > > Signed-off-by: Emilio G. Cota > --- > include/qemu/atomic.h | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/include/qemu/atomic.h b/include/qemu/atomic.h > index 5bc4d6c..4a4f2fb 100644 > --- a/include/qemu/atomic.h > +++ b/include/qemu/atomic.h > @@ -36,7 +36,14 @@ > #define smp_wmb() ({ barrier(); __atomic_thread_fence(__ATOMIC_RELEASE); barrier(); }) > #define smp_rmb() ({ barrier(); __atomic_thread_fence(__ATOMIC_ACQUIRE); barrier(); }) > > +#if defined(__SANITIZE_THREAD__) > #define smp_read_barrier_depends() ({ barrier(); __atomic_thread_fence(__ATOMIC_CONSUME); barrier(); }) > +#elsif defined(__alpha__) > +#define smp_read_barrier_depends() asm volatile("mb":::"memory") > +#else > +#define smp_read_barrier_depends() barrier() > +#endif > + > > /* Weak atomic operations prevent the compiler moving other > * loads/stores past the atomic operation load/store. However there is