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From: Sergey Fedorov <serge.fdrv@gmail.com>
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Date: Fri, 27 May 2016 17:20:36 +0300
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Subject: Re: [Qemu-devel] [PATCH v2 10/12] tcg/tci: Add support for fence
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To: Pranith Kumar <bobby.prani@gmail.com>
Cc: Richard Henderson <rth@twiddle.net>, qemu-devel@nongnu.org, Stefan Weil <sw@weilnetz.de>

On 27/05/16 17:17, Pranith Kumar wrote:
> Hi Sergey,
>
> Sergey Fedorov writes:
>
>> On 27/05/16 04:00, Richard Henderson wrote:
>>> diff --git a/tci.c b/tci.c
>>> index b488c0d..53b3f71 100644
>>> --- a/tci.c
>>> +++ b/tci.c
>>> @@ -1236,6 +1236,9 @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)
>>>                  tcg_abort();
>>>              }
>>>              break;
>>> +        case INDEX_op_fence:
>>> +            smp_mb();
>>> +            break;
>>>          default:
>>>              TODO();
>>>              break;
>> A bit of bike-shedding. While there's no common ISA term for "memory
>> barrier" (also known as a "membar", "memory fence", etc.), we already
>> refer to it as a "memory barrier" (or "mb") in include/qemu/atomic.h and
>> docs/atomics.txt. Why don't be consistent and avoid introducing yet
>> another term for the same thing?
>>
> Fair point. Do you think tcg_out_mb() is better then?

Yes, if used together with 'INDEX_op_mb', of course.

Kind regards,
Sergey