From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52035) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b7glB-0006dH-N1 for qemu-devel@nongnu.org; Tue, 31 May 2016 06:18:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b7gl7-0001EF-C5 for qemu-devel@nongnu.org; Tue, 31 May 2016 06:18:52 -0400 Received: from mx1.redhat.com ([209.132.183.28]:36336) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b7gl7-0001Dv-43 for qemu-devel@nongnu.org; Tue, 31 May 2016 06:18:49 -0400 Received: from int-mx11.intmail.prod.int.phx2.redhat.com (int-mx11.intmail.prod.int.phx2.redhat.com [10.5.11.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id ACEAD15447 for ; Tue, 31 May 2016 10:18:48 +0000 (UTC) References: <1463496205-251412-1-git-send-email-imammedo@redhat.com> <1463496205-251412-6-git-send-email-imammedo@redhat.com> <574C8413.1030701@redhat.com> <20160531095051.449317dc@nial.brq.redhat.com> From: Marcel Apfelbaum Message-ID: <574D6504.5010406@redhat.com> Date: Tue, 31 May 2016 13:18:44 +0300 MIME-Version: 1.0 In-Reply-To: <20160531095051.449317dc@nial.brq.redhat.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 05/33] pc: acpi: consolidate CPU hotplug AML List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Igor Mammedov Cc: qemu-devel@nongnu.org, armbru@redhat.com, drjones@redhat.com, rkrcmar@redhat.com, ehabkost@redhat.com, mst@redhat.com On 05/31/2016 10:50 AM, Igor Mammedov wrote: > On Mon, 30 May 2016 21:18:59 +0300 > Marcel Apfelbaum wrote: > >> On 05/17/2016 05:42 PM, Igor Mammedov wrote: >>> move the former SSDT part of CPU hoplug close to DSDT part. >>> AML is only moved but there isn't any functional change. >>> >> >> The patch looks good to me, >> but why did you decide to get rid of the build_processor_devices function? >> I would simply move it to the new file. >> Maybe is a matter of taste, anyway: > the only reason was that it looks cleaner to me (even for legacy code), > that way CPU devices code / defines are in a smaller and > do not pollute already way too big acpi-build.c. I agree with moving the code, I was referring to the fact that you could keep the function and just move it instead of merging the code in another method. But maybe is only a matter of taste. Thanks, Marcel > For new hotplug it's even necessary so that it would be easy to share > with ARM target. > >> >> Reviewed-by: Marcel Apfelbaum >> >> Thanks, >> Marcel >> >> >>> Signed-off-by: Igor Mammedov >>> --- >>> hw/acpi/cpu_hotplug_acpi_table.c | 104 +++++++++++++++++++++++++++++++++++- >>> hw/i386/acpi-build.c | 112 +-------------------------------------- >>> include/hw/acpi/cpu_hotplug.h | 3 +- >>> 3 files changed, 106 insertions(+), 113 deletions(-) >>> >>> diff --git a/hw/acpi/cpu_hotplug_acpi_table.c b/hw/acpi/cpu_hotplug_acpi_table.c >>> index 97bb109..730f44c 100644 >>> --- a/hw/acpi/cpu_hotplug_acpi_table.c >>> +++ b/hw/acpi/cpu_hotplug_acpi_table.c >>> @@ -15,12 +15,19 @@ >>> >>> #include "qemu/osdep.h" >>> #include "hw/acpi/cpu_hotplug.h" >>> +#include "hw/i386/pc.h" >>> >>> -void build_cpu_hotplug_aml(Aml *ctx) >>> +void build_cpu_hotplug_aml(Aml *ctx, MachineState *machine, >>> + uint16_t io_base, uint16_t io_len) >>> { >>> + Aml *dev; >>> + Aml *crs; >>> + Aml *pkg; >>> + Aml *field; >>> Aml *method; >>> Aml *if_ctx; >>> Aml *else_ctx; >>> + int i, apic_idx; >>> Aml *sb_scope = aml_scope("_SB"); >>> uint8_t madt_tmpl[8] = {0x00, 0x08, 0x00, 0x00, 0x00, 0, 0, 0}; >>> Aml *cpu_id = aml_arg(0); >>> @@ -29,6 +36,9 @@ void build_cpu_hotplug_aml(Aml *ctx) >>> Aml *cpus_map = aml_name(CPU_ON_BITMAP); >>> Aml *zero = aml_int(0); >>> Aml *one = aml_int(1); >>> + MachineClass *mc = MACHINE_GET_CLASS(machine); >>> + CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(machine); >>> + PCMachineState *pcms = PC_MACHINE(machine); >>> >>> /* >>> * _MAT method - creates an madt apic buffer >>> @@ -132,5 +142,97 @@ void build_cpu_hotplug_aml(Aml *ctx) >>> } >>> aml_append(sb_scope, method); >>> >>> + /* The current AML generator can cover the APIC ID range [0..255], >>> + * inclusive, for VCPU hotplug. */ >>> + QEMU_BUILD_BUG_ON(ACPI_CPU_HOTPLUG_ID_LIMIT > 256); >>> + g_assert(pcms->apic_id_limit <= ACPI_CPU_HOTPLUG_ID_LIMIT); >>> + >>> + /* create PCI0.PRES device and its _CRS to reserve CPU hotplug MMIO */ >>> + dev = aml_device("PCI0." stringify(CPU_HOTPLUG_RESOURCE_DEVICE)); >>> + aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A06"))); >>> + aml_append(dev, >>> + aml_name_decl("_UID", aml_string("CPU Hotplug resources")) >>> + ); >>> + /* device present, functioning, decoding, not shown in UI */ >>> + aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); >>> + crs = aml_resource_template(); >>> + aml_append(crs, >>> + aml_io(AML_DECODE16, io_base, io_base, 1, io_len) >>> + ); >>> + aml_append(dev, aml_name_decl("_CRS", crs)); >>> + aml_append(sb_scope, dev); >>> + /* declare CPU hotplug MMIO region and PRS field to access it */ >>> + aml_append(sb_scope, aml_operation_region( >>> + "PRST", AML_SYSTEM_IO, aml_int(io_base), io_len)); >>> + field = aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE); >>> + aml_append(field, aml_named_field("PRS", 256)); >>> + aml_append(sb_scope, field); >>> + >>> + /* build Processor object for each processor */ >>> + for (i = 0; i < apic_ids->len; i++) { >>> + int apic_id = apic_ids->cpus[i].arch_id; >>> + >>> + assert(apic_id < ACPI_CPU_HOTPLUG_ID_LIMIT); >>> + >>> + dev = aml_processor(apic_id, 0, 0, "CP%.02X", apic_id); >>> + >>> + method = aml_method("_MAT", 0, AML_NOTSERIALIZED); >>> + aml_append(method, >>> + aml_return(aml_call1(CPU_MAT_METHOD, aml_int(apic_id)))); >>> + aml_append(dev, method); >>> + >>> + method = aml_method("_STA", 0, AML_NOTSERIALIZED); >>> + aml_append(method, >>> + aml_return(aml_call1(CPU_STATUS_METHOD, aml_int(apic_id)))); >>> + aml_append(dev, method); >>> + >>> + method = aml_method("_EJ0", 1, AML_NOTSERIALIZED); >>> + aml_append(method, >>> + aml_return(aml_call2(CPU_EJECT_METHOD, aml_int(apic_id), >>> + aml_arg(0))) >>> + ); >>> + aml_append(dev, method); >>> + >>> + aml_append(sb_scope, dev); >>> + } >>> + >>> + /* build this code: >>> + * Method(NTFY, 2) {If (LEqual(Arg0, 0x00)) {Notify(CP00, Arg1)} ...} >>> + */ >>> + /* Arg0 = Processor ID = APIC ID */ >>> + method = aml_method(AML_NOTIFY_METHOD, 2, AML_NOTSERIALIZED); >>> + for (i = 0; i < apic_ids->len; i++) { >>> + int apic_id = apic_ids->cpus[i].arch_id; >>> + >>> + if_ctx = aml_if(aml_equal(aml_arg(0), aml_int(apic_id))); >>> + aml_append(if_ctx, >>> + aml_notify(aml_name("CP%.02X", apic_id), aml_arg(1)) >>> + ); >>> + aml_append(method, if_ctx); >>> + } >>> + aml_append(sb_scope, method); >>> + >>> + /* build "Name(CPON, Package() { One, One, ..., Zero, Zero, ... })" >>> + * >>> + * Note: The ability to create variable-sized packages was first >>> + * introduced in ACPI 2.0. ACPI 1.0 only allowed fixed-size packages >>> + * ith up to 255 elements. Windows guests up to win2k8 fail when >>> + * VarPackageOp is used. >>> + */ >>> + pkg = pcms->apic_id_limit <= 255 ? aml_package(pcms->apic_id_limit) : >>> + aml_varpackage(pcms->apic_id_limit); >>> + >>> + for (i = 0, apic_idx = 0; i < apic_ids->len; i++) { >>> + int apic_id = apic_ids->cpus[i].arch_id; >>> + >>> + for (; apic_idx < apic_id; apic_idx++) { >>> + aml_append(pkg, aml_int(0)); >>> + } >>> + aml_append(pkg, aml_int(apic_ids->cpus[i].cpu ? 1 : 0)); >>> + apic_idx = apic_id + 1; >>> + } >>> + aml_append(sb_scope, aml_name_decl(CPU_ON_BITMAP, pkg)); >>> + g_free(apic_ids); >>> + >>> aml_append(ctx, sb_scope); >>> } >>> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c >>> index ff98ad8..822230f 100644 >>> --- a/hw/i386/acpi-build.c >>> +++ b/hw/i386/acpi-build.c >>> @@ -943,114 +943,6 @@ static Aml *build_crs(PCIHostState *host, >>> return crs; >>> } >>> >>> -static void build_processor_devices(Aml *sb_scope, MachineState *machine, >>> - AcpiPmInfo *pm) >>> -{ >>> - int i, apic_idx; >>> - Aml *dev; >>> - Aml *crs; >>> - Aml *pkg; >>> - Aml *field; >>> - Aml *ifctx; >>> - Aml *method; >>> - MachineClass *mc = MACHINE_GET_CLASS(machine); >>> - CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(machine); >>> - PCMachineState *pcms = PC_MACHINE(machine); >>> - >>> - /* The current AML generator can cover the APIC ID range [0..255], >>> - * inclusive, for VCPU hotplug. */ >>> - QEMU_BUILD_BUG_ON(ACPI_CPU_HOTPLUG_ID_LIMIT > 256); >>> - g_assert(pcms->apic_id_limit <= ACPI_CPU_HOTPLUG_ID_LIMIT); >>> - >>> - /* create PCI0.PRES device and its _CRS to reserve CPU hotplug MMIO */ >>> - dev = aml_device("PCI0." stringify(CPU_HOTPLUG_RESOURCE_DEVICE)); >>> - aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A06"))); >>> - aml_append(dev, >>> - aml_name_decl("_UID", aml_string("CPU Hotplug resources")) >>> - ); >>> - /* device present, functioning, decoding, not shown in UI */ >>> - aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); >>> - crs = aml_resource_template(); >>> - aml_append(crs, >>> - aml_io(AML_DECODE16, pm->cpu_hp_io_base, pm->cpu_hp_io_base, 1, >>> - pm->cpu_hp_io_len) >>> - ); >>> - aml_append(dev, aml_name_decl("_CRS", crs)); >>> - aml_append(sb_scope, dev); >>> - /* declare CPU hotplug MMIO region and PRS field to access it */ >>> - aml_append(sb_scope, aml_operation_region( >>> - "PRST", AML_SYSTEM_IO, aml_int(pm->cpu_hp_io_base), pm->cpu_hp_io_len)); >>> - field = aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE); >>> - aml_append(field, aml_named_field("PRS", 256)); >>> - aml_append(sb_scope, field); >>> - >>> - /* build Processor object for each processor */ >>> - for (i = 0; i < apic_ids->len; i++) { >>> - int apic_id = apic_ids->cpus[i].arch_id; >>> - >>> - assert(apic_id < ACPI_CPU_HOTPLUG_ID_LIMIT); >>> - >>> - dev = aml_processor(apic_id, 0, 0, "CP%.02X", apic_id); >>> - >>> - method = aml_method("_MAT", 0, AML_NOTSERIALIZED); >>> - aml_append(method, >>> - aml_return(aml_call1(CPU_MAT_METHOD, aml_int(apic_id)))); >>> - aml_append(dev, method); >>> - >>> - method = aml_method("_STA", 0, AML_NOTSERIALIZED); >>> - aml_append(method, >>> - aml_return(aml_call1(CPU_STATUS_METHOD, aml_int(apic_id)))); >>> - aml_append(dev, method); >>> - >>> - method = aml_method("_EJ0", 1, AML_NOTSERIALIZED); >>> - aml_append(method, >>> - aml_return(aml_call2(CPU_EJECT_METHOD, aml_int(apic_id), >>> - aml_arg(0))) >>> - ); >>> - aml_append(dev, method); >>> - >>> - aml_append(sb_scope, dev); >>> - } >>> - >>> - /* build this code: >>> - * Method(NTFY, 2) {If (LEqual(Arg0, 0x00)) {Notify(CP00, Arg1)} ...} >>> - */ >>> - /* Arg0 = Processor ID = APIC ID */ >>> - method = aml_method(AML_NOTIFY_METHOD, 2, AML_NOTSERIALIZED); >>> - for (i = 0; i < apic_ids->len; i++) { >>> - int apic_id = apic_ids->cpus[i].arch_id; >>> - >>> - ifctx = aml_if(aml_equal(aml_arg(0), aml_int(apic_id))); >>> - aml_append(ifctx, >>> - aml_notify(aml_name("CP%.02X", apic_id), aml_arg(1)) >>> - ); >>> - aml_append(method, ifctx); >>> - } >>> - aml_append(sb_scope, method); >>> - >>> - /* build "Name(CPON, Package() { One, One, ..., Zero, Zero, ... })" >>> - * >>> - * Note: The ability to create variable-sized packages was first >>> - * introduced in ACPI 2.0. ACPI 1.0 only allowed fixed-size packages >>> - * ith up to 255 elements. Windows guests up to win2k8 fail when >>> - * VarPackageOp is used. >>> - */ >>> - pkg = pcms->apic_id_limit <= 255 ? aml_package(pcms->apic_id_limit) : >>> - aml_varpackage(pcms->apic_id_limit); >>> - >>> - for (i = 0, apic_idx = 0; i < apic_ids->len; i++) { >>> - int apic_id = apic_ids->cpus[i].arch_id; >>> - >>> - for (; apic_idx < apic_id; apic_idx++) { >>> - aml_append(pkg, aml_int(0)); >>> - } >>> - aml_append(pkg, aml_int(apic_ids->cpus[i].cpu ? 1 : 0)); >>> - apic_idx = apic_id + 1; >>> - } >>> - aml_append(sb_scope, aml_name_decl(CPU_ON_BITMAP, pkg)); >>> - g_free(apic_ids); >>> -} >>> - >>> static void build_memory_devices(Aml *sb_scope, int nr_mem, >>> uint16_t io_base, uint16_t io_len) >>> { >>> @@ -2043,7 +1935,7 @@ build_dsdt(GArray *table_data, GArray *linker, >>> build_q35_pci0_int(dsdt); >>> } >>> >>> - build_cpu_hotplug_aml(dsdt); >>> + build_cpu_hotplug_aml(dsdt, machine, pm->cpu_hp_io_base, pm->cpu_hp_io_len); >>> build_memory_hotplug_aml(dsdt, nr_mem, pm->mem_hp_io_base, >>> pm->mem_hp_io_len); >>> >>> @@ -2305,8 +2197,6 @@ build_dsdt(GArray *table_data, GArray *linker, >>> >>> sb_scope = aml_scope("\\_SB"); >>> { >>> - build_processor_devices(sb_scope, machine, pm); >>> - >>> build_memory_devices(sb_scope, nr_mem, pm->mem_hp_io_base, >>> pm->mem_hp_io_len); >>> >>> diff --git a/include/hw/acpi/cpu_hotplug.h b/include/hw/acpi/cpu_hotplug.h >>> index f22640e..9b1d0cf 100644 >>> --- a/include/hw/acpi/cpu_hotplug.h >>> +++ b/include/hw/acpi/cpu_hotplug.h >>> @@ -34,5 +34,6 @@ void acpi_cpu_hotplug_init(MemoryRegion *parent, Object *owner, >>> #define CPU_STATUS_MAP "PRS" >>> #define CPU_SCAN_METHOD "PRSC" >>> >>> -void build_cpu_hotplug_aml(Aml *ctx); >>> +void build_cpu_hotplug_aml(Aml *ctx, MachineState *machine, >>> + uint16_t io_base, uint16_t io_len); >>> #endif >>> >> >> >