From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47207) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b8YLc-0000qO-PH for qemu-devel@nongnu.org; Thu, 02 Jun 2016 15:32:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1b8YLW-00039t-TS for qemu-devel@nongnu.org; Thu, 02 Jun 2016 15:32:03 -0400 Received: from mail-lf0-x241.google.com ([2a00:1450:4010:c07::241]:35805) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1b8YLW-00039D-0S for qemu-devel@nongnu.org; Thu, 02 Jun 2016 15:31:58 -0400 Received: by mail-lf0-x241.google.com with SMTP id q63so6072321lfi.2 for ; Thu, 02 Jun 2016 12:31:57 -0700 (PDT) References: <20160531183928.29406-1-bobby.prani@gmail.com> <20160531183928.29406-9-bobby.prani@gmail.com> From: Sergey Fedorov Message-ID: <575089AB.3090905@gmail.com> Date: Thu, 2 Jun 2016 22:31:55 +0300 MIME-Version: 1.0 In-Reply-To: <20160531183928.29406-9-bobby.prani@gmail.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [RFC v2 PATCH 08/13] tcg/s390: Add support for fence List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Pranith Kumar , Alexander Graf , Richard Henderson , "open list:All patches CC here" Cc: serge.fdrv@linaro.org, alex.bennee@linaro.org On 31/05/16 21:39, Pranith Kumar wrote: > Cc: Alexander Graf > Signed-off-by: Richard Henderson > Signed-off-by: Pranith Kumar > --- > tcg/s390/tcg-target.inc.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/tcg/s390/tcg-target.inc.c b/tcg/s390/tcg-target.inc.c > index e95b04b..b4f14bc 100644 > --- a/tcg/s390/tcg-target.inc.c > +++ b/tcg/s390/tcg-target.inc.c > @@ -341,6 +341,7 @@ static tcg_insn_unit *tb_ret_addr; > #define FACILITY_EXT_IMM (1ULL << (63 - 21)) > #define FACILITY_GEN_INST_EXT (1ULL << (63 - 34)) > #define FACILITY_LOAD_ON_COND (1ULL << (63 - 45)) > +#define FACILITY_FAST_BCR_SER FACILITY_LOAD_ON_COND > > static uint64_t facilities; > > @@ -2157,6 +2158,13 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, > tgen_deposit(s, args[0], args[2], args[3], args[4]); > break; > > + case INDEX_op_mb: > + /* The host memory model is quite strong, we simply need to > + serialize the instruction stream. */ > + tcg_out_insn(s, RR, BCR, > + facilities & FACILITY_FAST_BCR_SER ? 14 : 15, 0); > + break; > + Do we? What does that mean? Kind regards, Sergey > case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */ > case INDEX_op_mov_i64: > case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */ > @@ -2278,6 +2286,7 @@ static const TCGTargetOpDef s390_op_defs[] = { > { INDEX_op_movcond_i64, { "r", "r", "rC", "r", "0" } }, > { INDEX_op_deposit_i64, { "r", "0", "r" } }, > > + { INDEX_op_mb, { "r" } }, > { -1 }, > }; >