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From: Sergey Fedorov <serge.fdrv@gmail.com>
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Date: Thu, 2 Jun 2016 23:38:53 +0300
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Subject: Re: [Qemu-devel] [RFC v2 PATCH 01/13] Introduce TCGOpcode for
 memory barrier
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To: Richard Henderson <rth@twiddle.net>, Pranith Kumar <bobby.prani@gmail.com>, "open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: serge.fdrv@linaro.org, alex.bennee@linaro.org

On 02/06/16 23:36, Richard Henderson wrote:
> On 06/02/2016 09:30 AM, Sergey Fedorov wrote:
>> I think we need to extend TCG load/store instruction attributes to
>> provide information about guest ordering requirements and leave this TCG
>> operation only for explicit barrier instruction translation.
>
> I do not agree.  I think separate barriers are much cleaner and easier
> to manage and reason with.
>

How are we going to emulate strongly-ordered guests on weakly-ordered
hosts then? I think if every load/store operation must specify which
ordering it implies then this task would be quite simple.

Kind regards,
Sergey