Re: [PATCH v5 00/18] WHPX support for Arm

[Bernhard Beschow <shentey@gmail.com>]

Am 8. August 2025 06:54:01 UTC schrieb Mohamed Mediouni <mohamed@unpredictable.fr>:
>Link to branch: https://github.com/mediouni-m/qemu whpx (tag for this submission: whpx-v5)
>
>Missing features:
>- PSCI state sync with Hyper-V: notably breaks reboots when multiple cores are enabled
>- Interrupt controller save-restore
>- SVE register sync
>
>To do:
>- Switching ITS to off by default when using HVF w/ vGIC or WHPX (will probably do when both the series are merged)
>- After that, perhaps exit if ITS is explicitly enabled.
>
>Note:
>
>"accel/system: Introduce hwaccel_enabled() helper" taken from the mailing list, added here
>as part of this series to make it compilable as a whole.
>
>"hw/arm: virt: add GICv2m for the case when ITS is not available" present in both the HVF
>vGIC and this series.
>
>Updates since v4:
>- Taking into account review comments
>- Add migration blocker in the vGICv3 code due to missing interrupt controller save/restore
>- Debug register sync
>
>Updates since v3:
>- Disabling SVE on WHPX
>- Taking into account review comments incl:
>
>- fixing x86 support
>- reduce the amount of __x86_64__ checks in common code to the minimum (winhvemulation)
>which can be reduced even further down the road.
>- generalize get_physical_address_range into something common between hvf and whpx
>
>Updates since v2:
>- Fixed up a rebase screwup for whpx-internal.h
>- Fixed ID_AA64ISAR1_EL1 and ID_AA64ISAR2_EL1 feature probe for -cpu host
>- Switched to ID_AA64PFR1_EL1/ID_AA64DFR0_EL1 instead of their non-AA64 variant
>
>Updates since v1:
>- Shutdowns and reboots
>- MPIDR_EL1 register sync
>- Fixing GICD_TYPER_LPIS value
>- IPA size clamping
>- -cpu host now implemented
>
>Mohamed Mediouni (17):
>  hw/arm: virt: add GICv2m for the case when ITS is not available
>  whpx: Move around files before introducing AArch64 support
>  whpx: reshuffle common code
>  whpx: ifdef out winhvemulation on non-x86_64
>  whpx: common: add WHPX_INTERCEPT_DEBUG_TRAPS define
>  hw, target, accel: whpx: change apic_in_platform to kernel_irqchip
>  whpx: interrupt controller support
>  whpx: add arm64 support
>  whpx: copy over memory management logic from hvf
>  target/arm: cpu: mark WHPX as supporting PSCI 1.1
>  hw/arm: virt: cleanly fail on attempt to use the platform vGIC
>    together with ITS
>  whpx: arm64: clamp down IPA size
>  hw/arm, accel/hvf, whpx: unify get_physical_address_range between WHPX
>    and HVF
>  whpx: arm64: implement -cpu host
>  target/arm: whpx: instantiate GIC early
>  whpx: arm64: gicv3: add migration blocker
>  MAINTAINERS: Add myself as a maintainer for WHPX
>
>Philippe Mathieu-Daudé (1):
>  accel/system: Introduce hwaccel_enabled() helper
>
> MAINTAINERS                                   |    9 +-
> accel/hvf/hvf-all.c                           |    7 +-
> accel/meson.build                             |    1 +
> accel/whpx/meson.build                        |    7 +
> {target/i386 => accel}/whpx/whpx-accel-ops.c  |    6 +-
> accel/whpx/whpx-common.c                      |  666 +++++++++++
> hw/arm/virt-acpi-build.c                      |    4 +-
> hw/arm/virt.c                                 |   34 +-
> hw/i386/x86-cpu.c                             |    4 +-
> hw/intc/arm_gicv3_common.c                    |    3 +
> hw/intc/arm_gicv3_whpx.c                      |  272 +++++
> hw/intc/meson.build                           |    1 +
> include/hw/arm/virt.h                         |    2 +
> include/hw/boards.h                           |    3 +-
> include/hw/intc/arm_gicv3_common.h            |    3 +
> include/system/hvf_int.h                      |    2 +
> include/system/hw_accel.h                     |   13 +
> .../whpx => include/system}/whpx-accel-ops.h  |    4 +-
> include/system/whpx-all.h                     |   20 +
> include/system/whpx-common.h                  |   26 +
> .../whpx => include/system}/whpx-internal.h   |   14 +-
> include/system/whpx.h                         |    4 +-
> meson.build                                   |   21 +-
> target/arm/cpu.c                              |    3 +-
> target/arm/cpu64.c                            |   19 +-
> target/arm/hvf-stub.c                         |   20 -
> target/arm/hvf/hvf.c                          |    6 +-
> target/arm/hvf_arm.h                          |    3 -
> target/arm/meson.build                        |    2 +-
> target/arm/whpx/meson.build                   |    5 +
> target/arm/whpx/whpx-all.c                    | 1025 +++++++++++++++++
> target/arm/whpx/whpx-stub.c                   |   15 +
> target/arm/whpx_arm.h                         |   17 +
> target/i386/cpu-apic.c                        |    2 +-
> target/i386/hvf/hvf.c                         |   11 +
> target/i386/whpx/meson.build                  |    1 -
> target/i386/whpx/whpx-all.c                   |  569 +--------
> target/i386/whpx/whpx-apic.c                  |    2 +-
> 38 files changed, 2207 insertions(+), 619 deletions(-)
> create mode 100644 accel/whpx/meson.build
> rename {target/i386 => accel}/whpx/whpx-accel-ops.c (96%)
> create mode 100644 accel/whpx/whpx-common.c
> create mode 100644 hw/intc/arm_gicv3_whpx.c
> rename {target/i386/whpx => include/system}/whpx-accel-ops.h (92%)
> create mode 100644 include/system/whpx-all.h
> create mode 100644 include/system/whpx-common.h
> rename {target/i386/whpx => include/system}/whpx-internal.h (96%)
> delete mode 100644 target/arm/hvf-stub.c
> create mode 100644 target/arm/whpx/meson.build
> create mode 100644 target/arm/whpx/whpx-all.c
> create mode 100644 target/arm/whpx/whpx-stub.c
> create mode 100644 target/arm/whpx_arm.h
>

Ran this branch for a couple of days on x86_64 without any issues. So, for the x86_64 refactorings:

Tested-by: Bernhard Beschow <shentey@gmail.com>