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Date: Mon, 13 Jun 2016 15:19:54 +0800
From: Shannon Zhao <zhaoshenglong@huawei.com>
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Subject: Re: [Qemu-devel] [PATCH v2 13/22] hw/intc/arm_gicv3: Wire up
 distributor and redistributor MMIO regions
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To: Peter Maydell <peter.maydell@linaro.org>, qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: patches@linaro.org, Shlomo Pongratz <shlomo.pongratz@huawei.com>, Shlomo Pongratz <shlomopongratz@gmail.com>, Pavel Fedin <p.fedin@samsung.com>, Shannon Zhao <shannon.zhao@linaro.org>, Christoffer Dall <christoffer.dall@linaro.org>



On 2016/5/26 22:55, Peter Maydell wrote:
> Wire up the MMIO functions exposed by the distributor and the
> redistributor into MMIO regions exposed by the GICv3 device.
> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org>

> ---
>  hw/intc/arm_gicv3.c | 15 ++++++++++++++-
>  1 file changed, 14 insertions(+), 1 deletion(-)
> 
> diff --git a/hw/intc/arm_gicv3.c b/hw/intc/arm_gicv3.c
> index 7c4bee6..e8f6766 100644
> --- a/hw/intc/arm_gicv3.c
> +++ b/hw/intc/arm_gicv3.c
> @@ -324,6 +324,19 @@ static void arm_gicv3_post_load(GICv3State *s)
>      gicv3_cache_all_target_cpustates(s);
>  }
>  
> +static const MemoryRegionOps gic_ops[] = {
> +    {
> +        .read_with_attrs = gicv3_dist_read,
> +        .write_with_attrs = gicv3_dist_write,
> +        .endianness = DEVICE_NATIVE_ENDIAN,
> +    },
> +    {
> +        .read_with_attrs = gicv3_redist_read,
> +        .write_with_attrs = gicv3_redist_write,
> +        .endianness = DEVICE_NATIVE_ENDIAN,
> +    }
> +};
> +
>  static void arm_gic_realize(DeviceState *dev, Error **errp)
>  {
>      /* Device instance realize function for the GIC sysbus device */
> @@ -337,7 +350,7 @@ static void arm_gic_realize(DeviceState *dev, Error **errp)
>          return;
>      }
>  
> -    gicv3_init_irqs_and_mmio(s, gicv3_set_irq, NULL);
> +    gicv3_init_irqs_and_mmio(s, gicv3_set_irq, gic_ops);
>  }
>  
>  static void arm_gicv3_class_init(ObjectClass *klass, void *data)
> 

-- 
Shannon