From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50021) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bFQqq-00011O-7Z for qemu-devel@nongnu.org; Tue, 21 Jun 2016 14:56:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bFQqm-00080V-1g for qemu-devel@nongnu.org; Tue, 21 Jun 2016 14:56:43 -0400 Received: from mx1.redhat.com ([209.132.183.28]:50806) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bFQql-00080M-Q9 for qemu-devel@nongnu.org; Tue, 21 Jun 2016 14:56:39 -0400 References: <1465888776-25985-1-git-send-email-marcel@redhat.com> <1465888776-25985-4-git-send-email-marcel@redhat.com> <11e09b5d-34d6-b1be-2543-f5cc2fe5572a@redhat.com> From: Marcel Apfelbaum Message-ID: <57698DE2.2080101@redhat.com> Date: Tue, 21 Jun 2016 21:56:34 +0300 MIME-Version: 1.0 In-Reply-To: <11e09b5d-34d6-b1be-2543-f5cc2fe5572a@redhat.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v4 3/4] hw/iommu: enable iommu with -device List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paolo Bonzini , qemu-devel@nongnu.org Cc: ehabkost@redhat.com, mst@redhat.com, bd.aviv@gmail.com, armbru@redhat.com, peterx@redhat.com, alex.williamson@redhat.com, jan.kiszka@web.de, davidkiarie4@gmail.com On 06/21/2016 07:54 PM, Paolo Bonzini wrote: > > > On 14/06/2016 09:19, Marcel Apfelbaum wrote: >> Use the standard '-device iommu' to create the IOMMU device. > > It's "-device intel-iommu", apart from this it looks good, thanks! > Thanks Paolo! Michael, can you please correct the patch message? Is already rebased on your tree. If you prefer another re-spin please let me know. Thanks, Marcel > Paolo > >> The legacy '-machine,iommu=on' can still be used. >> >> Signed-off-by: Marcel Apfelbaum >> --- >> hw/i386/intel_iommu.c | 16 ++++++++++++++++ >> hw/i386/pc_q35.c | 1 - >> hw/pci-host/q35.c | 17 +---------------- >> 3 files changed, 17 insertions(+), 17 deletions(-) >> >> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c >> index 347718f..ea25585 100644 >> --- a/hw/i386/intel_iommu.c >> +++ b/hw/i386/intel_iommu.c >> @@ -24,6 +24,7 @@ >> #include "exec/address-spaces.h" >> #include "intel_iommu_internal.h" >> #include "hw/pci/pci.h" >> +#include "hw/i386/pc.h" >> >> /*#define DEBUG_INTEL_IOMMU*/ >> #ifdef DEBUG_INTEL_IOMMU >> @@ -2014,8 +2015,20 @@ static void vtd_reset(DeviceState *dev) >> vtd_init(s); >> } >> >> +static AddressSpace *vtd_host_dma_iommu(PCIBus *bus, void *opaque, int devfn) >> +{ >> + IntelIOMMUState *s = opaque; >> + VTDAddressSpace *vtd_as; >> + >> + assert(0 <= devfn && devfn <= VTD_PCI_DEVFN_MAX); >> + >> + vtd_as = vtd_find_add_as(s, bus, devfn); >> + return &vtd_as->as; >> +} >> + >> static void vtd_realize(DeviceState *dev, Error **errp) >> { >> + PCIBus *bus = PC_MACHINE(qdev_get_machine())->bus; >> IntelIOMMUState *s = INTEL_IOMMU_DEVICE(dev); >> >> VTD_DPRINTF(GENERAL, ""); >> @@ -2029,6 +2042,8 @@ static void vtd_realize(DeviceState *dev, Error **errp) >> s->vtd_as_by_busptr = g_hash_table_new_full(vtd_uint64_hash, vtd_uint64_equal, >> g_free, g_free); >> vtd_init(s); >> + sysbus_mmio_map(SYS_BUS_DEVICE(s), 0, Q35_HOST_BRIDGE_IOMMU_ADDR); >> + pci_setup_iommu(bus, vtd_host_dma_iommu, dev); >> } >> >> static void vtd_class_init(ObjectClass *klass, void *data) >> @@ -2039,6 +2054,7 @@ static void vtd_class_init(ObjectClass *klass, void *data) >> dc->realize = vtd_realize; >> dc->vmsd = &vtd_vmstate; >> dc->props = vtd_properties; >> + dc->hotpluggable = false; >> } >> >> static const TypeInfo vtd_info = { >> diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c >> index 431eaed..47e93d4 100644 >> --- a/hw/i386/pc_q35.c >> +++ b/hw/i386/pc_q35.c >> @@ -169,7 +169,6 @@ static void pc_q35_init(MachineState *machine) >> qdev_init_nofail(DEVICE(q35_host)); >> phb = PCI_HOST_BRIDGE(q35_host); >> host_bus = phb->bus; >> - pcms->bus = phb->bus; >> /* create ISA bus */ >> lpc = pci_create_simple_multifunction(host_bus, PCI_DEVFN(ICH9_LPC_DEV, >> ICH9_LPC_FUNC), true, >> diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c >> index 141ba5b..4bd5fb5 100644 >> --- a/hw/pci-host/q35.c >> +++ b/hw/pci-host/q35.c >> @@ -52,6 +52,7 @@ static void q35_host_realize(DeviceState *dev, Error **errp) >> pci->bus = pci_bus_new(DEVICE(s), "pcie.0", >> s->mch.pci_address_space, s->mch.address_space_io, >> 0, TYPE_PCIE_BUS); >> + PC_MACHINE(qdev_get_machine())->bus = pci->bus; >> qdev_set_parent_bus(DEVICE(&s->mch), BUS(pci->bus)); >> qdev_init_nofail(DEVICE(&s->mch)); >> } >> @@ -426,28 +427,12 @@ static void mch_reset(DeviceState *qdev) >> mch_update(mch); >> } >> >> -static AddressSpace *q35_host_dma_iommu(PCIBus *bus, void *opaque, int devfn) >> -{ >> - IntelIOMMUState *s = opaque; >> - VTDAddressSpace *vtd_as; >> - >> - assert(0 <= devfn && devfn <= VTD_PCI_DEVFN_MAX); >> - >> - vtd_as = vtd_find_add_as(s, bus, devfn); >> - return &vtd_as->as; >> -} >> - >> static void mch_init_dmar(MCHPCIState *mch) >> { >> - PCIBus *pci_bus = PCI_BUS(qdev_get_parent_bus(DEVICE(mch))); >> - >> mch->iommu = INTEL_IOMMU_DEVICE(qdev_create(NULL, TYPE_INTEL_IOMMU_DEVICE)); >> object_property_add_child(OBJECT(mch), "intel-iommu", >> OBJECT(mch->iommu), NULL); >> qdev_init_nofail(DEVICE(mch->iommu)); >> - sysbus_mmio_map(SYS_BUS_DEVICE(mch->iommu), 0, Q35_HOST_BRIDGE_IOMMU_ADDR); >> - >> - pci_setup_iommu(pci_bus, q35_host_dma_iommu, mch->iommu); >> } >> >> static void mch_realize(PCIDevice *d, Error **errp) >>