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From: "Ефимов Василий" <real@ispras.ru>
To: Paolo Bonzini <pbonzini@redhat.com>, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 3/3] ich9: unify pic and ioapic IRQ vectors
Date: Wed, 22 Jun 2016 14:03:41 +0300	[thread overview]
Message-ID: <576A708D.5020201@ispras.ru> (raw)
In-Reply-To: <1466433559-30930-4-git-send-email-pbonzini@redhat.com>

20.06.2016 17:39, Paolo Bonzini wrote:
> ich9->pic and ich9->ioapic differ for the first 16 GSIs (because
> ich9->pic is wired to 8259+IOAPIC but ich9->ioapic is wired to
> IOAPIC only).  However, ich9->ioapic is never used for the first
> 16 GSIs, so the two vectors can be merged.
>
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
> ---
>   hw/i386/pc_q35.c       | 3 +--
>   hw/isa/lpc_ich9.c      | 4 ++--
>   include/hw/i386/ich9.h | 3 +--
>   3 files changed, 4 insertions(+), 6 deletions(-)
>
> diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
> index e4b541f..78afd4f 100644
> --- a/hw/i386/pc_q35.c
> +++ b/hw/i386/pc_q35.c
> @@ -184,8 +184,7 @@ static void pc_q35_init(MachineState *machine)
>                                PC_MACHINE_ACPI_DEVICE_PROP, &error_abort);
>
>       ich9_lpc = ICH9_LPC_DEVICE(lpc);
> -    ich9_lpc->pic = gsi;
> -    ich9_lpc->ioapic = gsi_state->ioapic_irq;
> +    ich9_lpc->gsi = gsi;
>       pci_bus_irqs(host_bus, ich9_lpc_set_irq, ich9_lpc_map_irq, ich9_lpc,
>                    ICH9_LPC_NB_PIRQS);
>       pci_bus_set_route_irq_fn(host_bus, ich9_route_intx_pin_to_irq);
> diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
> index 446797b..7703357 100644
> --- a/hw/isa/lpc_ich9.c
> +++ b/hw/isa/lpc_ich9.c
> @@ -225,7 +225,7 @@ static void ich9_lpc_update_pic(ICH9LPCState *lpc, int gsi)
>           pic_level |= lpc->sci_level;
>       }
>
> -    qemu_set_irq(lpc->pic[gsi], pic_level);
> +    qemu_set_irq(lpc->gsi[gsi], pic_level);
>   }
>
>   /* APIC mode: GSIx: PIRQ[A-H] -> GSI 16, ... no pirq shares same APIC pins. */
> @@ -250,7 +250,7 @@ static void ich9_lpc_update_apic(ICH9LPCState *lpc, int gsi)
>           level |= lpc->sci_level;
>       }
>
> -    qemu_set_irq(lpc->ioapic[gsi], level);
> +    qemu_set_irq(lpc->gsi[gsi], level);
>   }
>
>   void ich9_lpc_set_irq(void *opaque, int pirq, int level)
> diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h
> index 88233c3..11243e5 100644
> --- a/include/hw/i386/ich9.h
> +++ b/include/hw/i386/ich9.h
> @@ -68,8 +68,7 @@ typedef struct ICH9LPCState {
>       MemoryRegion rcrb_mem; /* root complex register block */
>       Notifier machine_ready;
>
> -    qemu_irq *pic;
> -    qemu_irq *ioapic;
> +    qemu_irq *gsi;
>   } ICH9LPCState;
>
>   Object *ich9_lpc_find(void);
>
Reviewed-by: Efimov Vasily <real@ispras.ru>

      reply	other threads:[~2016-06-22 11:03 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-20 14:39 [Qemu-devel] [PATCH 0/3] ich9: clean up handling of output interrupt pins Paolo Bonzini
2016-06-20 14:39 ` [Qemu-devel] [PATCH 1/3] ich9: call ich9_lpc_update_pic for disabled pirqs Paolo Bonzini
2016-06-22 11:07   ` Ефимов Василий
2016-06-20 14:39 ` [Qemu-devel] [PATCH 2/3] ich9: clean up ich9_lpc_update_pic/ich9_lpc_update_apic and callers Paolo Bonzini
2016-06-22 11:03   ` Ефимов Василий
2016-06-20 14:39 ` [Qemu-devel] [PATCH 3/3] ich9: unify pic and ioapic IRQ vectors Paolo Bonzini
2016-06-22 11:03   ` Ефимов Василий [this message]

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