From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53280) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bFoAR-0000mx-3o for qemu-devel@nongnu.org; Wed, 22 Jun 2016 15:50:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bFoAM-0004VA-1m for qemu-devel@nongnu.org; Wed, 22 Jun 2016 15:50:30 -0400 Received: from mail-lf0-x241.google.com ([2a00:1450:4010:c07::241]:33967) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bFoAL-0004V6-QU for qemu-devel@nongnu.org; Wed, 22 Jun 2016 15:50:25 -0400 Received: by mail-lf0-x241.google.com with SMTP id l184so15351218lfl.1 for ; Wed, 22 Jun 2016 12:50:25 -0700 (PDT) References: <20160618040343.19517-1-bobby.prani@gmail.com> <20160618040343.19517-8-bobby.prani@gmail.com> From: Sergey Fedorov Message-ID: <576AEBFE.2060803@gmail.com> Date: Wed, 22 Jun 2016 22:50:22 +0300 MIME-Version: 1.0 In-Reply-To: <20160618040343.19517-8-bobby.prani@gmail.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [RFC v3 PATCH 07/14] tcg/ppc: Add support for fence List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Pranith Kumar , "Vassili Karpov (malc)" , Richard Henderson , "open list:All patches CC here" Cc: alex.bennee@linaro.org On 18/06/16 07:03, Pranith Kumar wrote: > Signed-off-by: Richard Henderson > Signed-off-by: Pranith Kumar > --- > tcg/ppc/tcg-target.inc.c | 24 ++++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/tcg/ppc/tcg-target.inc.c b/tcg/ppc/tcg-target.inc.c > index da10052..766848e 100644 > --- a/tcg/ppc/tcg-target.inc.c > +++ b/tcg/ppc/tcg-target.inc.c > @@ -469,6 +469,10 @@ static int tcg_target_const_match(tcg_target_long val, TCGType type, > #define STHX XO31(407) > #define STWX XO31(151) > > +#define EIEIO XO31(854) > +#define HWSYNC XO31(598) > +#define LWSYNC (HWSYNC | (1u << 21)) > + > #define SPR(a, b) ((((a)<<5)|(b))<<11) > #define LR SPR(8, 0) > #define CTR SPR(9, 0) > @@ -1237,6 +1241,21 @@ static void tcg_out_brcond2 (TCGContext *s, const TCGArg *args, > tcg_out_bc(s, BC | BI(7, CR_EQ) | BO_COND_TRUE, arg_label(args[5])); > } > > +static void tcg_out_mb(TCGContext *s, TCGArg a0) > +{ > + switch (a0 & TCG_MO_ALL) { > + case TCG_MO_LD_LD: > + tcg_out32(s, LWSYNC); lwsync can be used for all cases except store-load which requires hwsync. eieio is for synchronizing memory-mapped IO which is not used by TCG at all. So there should be: switch (a0 & TCG_MO_ALL) { case TCG_MO_ST_LD: tcg_out32(s, HWSYNC); break; default: tcg_out32(s, LWSYNC); break; } Kind regards, Sergey > + break; > + case TCG_MO_ST_ST: > + tcg_out32(s, EIEIO); > + break; > + default: > + tcg_out32(s, HWSYNC); > + break; > + } > +} > + > #ifdef __powerpc64__ > void ppc_tb_set_jmp_target(uintptr_t jmp_addr, uintptr_t addr) > { > @@ -2439,6 +2458,10 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, > tcg_out32(s, MULHD | TAB(args[0], args[1], args[2])); > break; > > + case INDEX_op_mb: > + tcg_out_mb(s, args[0]); > + break; > + > case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */ > case INDEX_op_mov_i64: > case INDEX_op_movi_i32: /* Always emitted via tcg_out_movi. */ > @@ -2586,6 +2609,7 @@ static const TCGTargetOpDef ppc_op_defs[] = { > { INDEX_op_qemu_st_i64, { "S", "S", "S", "S" } }, > #endif > > + { INDEX_op_mb, { } }, > { -1 }, > }; >