From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60260) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bIEbK-0002Xw-4R for qemu-devel@nongnu.org; Wed, 29 Jun 2016 08:28:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bIEbF-00052q-3j for qemu-devel@nongnu.org; Wed, 29 Jun 2016 08:28:17 -0400 References: <1467200246-32708-1-git-send-email-bharata@linux.vnet.ibm.com> From: Thomas Huth Message-ID: <5773BED8.1030902@redhat.com> Date: Wed, 29 Jun 2016 14:28:08 +0200 MIME-Version: 1.0 In-Reply-To: <1467200246-32708-1-git-send-email-bharata@linux.vnet.ibm.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v0] spapr: Restore support for 970MP and POWER8NVL CPU cores List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Bharata B Rao , qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, david@gibson.dropbear.id.au On 29.06.2016 13:37, Bharata B Rao wrote: > Introduction of core based CPU hotplug for PowerPC sPAPR didn't > add support for 970MP and POWER8NVL based core types. Add support for > the same. > > While we are here, add support for explicit specification of POWER5+_v2.1 > core type. > > Signed-off-by: Bharata B Rao > --- > hw/ppc/spapr_cpu_core.c | 20 ++++++++++++++++++-- > 1 file changed, 18 insertions(+), 2 deletions(-) > > diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c > index 2aa0dc5..e30b159 100644 > --- a/hw/ppc/spapr_cpu_core.c > +++ b/hw/ppc/spapr_cpu_core.c > @@ -337,12 +337,15 @@ static void glue(glue(spapr_cpu_core_, _fname), _initfn(Object *obj)) \ > core->cpu_class = oc; \ > } > > +SPAPR_CPU_CORE_INITFN(970mp_v1.0, 970MP_v10); > +SPAPR_CPU_CORE_INITFN(970mp_v1.1, 970MP_v11); > SPAPR_CPU_CORE_INITFN(970_v2.2, 970); > SPAPR_CPU_CORE_INITFN(POWER5+_v2.1, POWER5plus); > SPAPR_CPU_CORE_INITFN(POWER7_v2.3, POWER7); > SPAPR_CPU_CORE_INITFN(POWER7+_v2.1, POWER7plus); > SPAPR_CPU_CORE_INITFN(POWER8_v2.0, POWER8); > SPAPR_CPU_CORE_INITFN(POWER8E_v2.1, POWER8E); > +SPAPR_CPU_CORE_INITFN(POWER8NVL_v1.0, POWER8NVL); > > typedef struct SPAPRCoreInfo { > const char *name; > @@ -350,10 +353,19 @@ typedef struct SPAPRCoreInfo { > } SPAPRCoreInfo; > > static const SPAPRCoreInfo spapr_cores[] = { > - /* 970 */ > + /* 970 and aliaes */ > + { .name = "970_v2.2", .initfn = spapr_cpu_core_970_initfn }, > { .name = "970", .initfn = spapr_cpu_core_970_initfn }, > > - /* POWER5 */ > + /* 970MP variants and aliases */ > + { .name = "970MP_v1.0", .initfn = spapr_cpu_core_970MP_v10_initfn }, > + { .name = "970mp_v1.0", .initfn = spapr_cpu_core_970MP_v10_initfn }, > + { .name = "970MP_v1.1", .initfn = spapr_cpu_core_970MP_v11_initfn }, > + { .name = "970mp_v1.1", .initfn = spapr_cpu_core_970MP_v11_initfn }, > + { .name = "970mp", .initfn = spapr_cpu_core_970MP_v11_initfn }, Are the upper-case "970MP_v1.1" and "970MP_v1.0" lines required here? According to target-ppc/cpu-models.c, these CPU models are always spelled with lower-case letters in QEMU, aren't they? Thomas