From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44692) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bQcp5-0004Kn-A9 for qemu-devel@nongnu.org; Fri, 22 Jul 2016 11:57:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bQcp2-0001fC-3R for qemu-devel@nongnu.org; Fri, 22 Jul 2016 11:57:11 -0400 References: <1469200685-13695-1-git-send-email-michael@walle.cc> From: Alexander Graf Message-ID: <57924250.5020205@suse.de> Date: Fri, 22 Jul 2016 17:57:04 +0200 MIME-Version: 1.0 In-Reply-To: <1469200685-13695-1-git-send-email-michael@walle.cc> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] linux-user: ppc64: set MSR_CM bit for BookE 2.06 MMU List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Michael Walle , Riku Voipio Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org On 07/22/2016 05:18 PM, Michael Walle wrote: > 64 bit user mode doesn't work for the e5500 core because the MSR_CM bit is > not set which enables the 64 bit mode for this MMU model. Memory addresses > are truncated to 32 bit, which results in "Invalid data memory access" > error messages. Fix it by setting the MSR_CM bit for this MMU model. > > Signed-off-by: Michael Walle Yup, I guess that's about as smart as we have to be :). Reviewed-by: Alexander Graf Alex > --- > > This is a kind of a v2 patch. The did the fix in the wrong place: > http://lists.nongnu.org/archive/html/qemu-devel/2016-07/msg05409.html > > linux-user/main.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/linux-user/main.c b/linux-user/main.c > index 462e820..bac2cb0 100644 > --- a/linux-user/main.c > +++ b/linux-user/main.c > @@ -4626,10 +4626,11 @@ int main(int argc, char **argv, char **envp) > int i; > > #if defined(TARGET_PPC64) > + int flag = (env->insns_flags2 & PPC2_BOOKE206) ? MSR_CM : MSR_SF; > #if defined(TARGET_ABI32) > - env->msr &= ~((target_ulong)1 << MSR_SF); > + env->msr &= ~((target_ulong)1 << flag); > #else > - env->msr |= (target_ulong)1 << MSR_SF; > + env->msr |= (target_ulong)1 << flag; > #endif > #endif > env->nip = regs->nip;