From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>,
qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: Rebecca Cran <rebecca@nuviainc.com>
Subject: Re: [PATCH] target/arm: Correct calculation of tlb range invalidate length
Date: Tue, 30 Nov 2021 18:44:11 +0100 [thread overview]
Message-ID: <57c19405-15c9-fb06-1e9f-6377e46e2d4e@linaro.org> (raw)
In-Reply-To: <20211130173257.1274194-1-peter.maydell@linaro.org>
On 11/30/21 6:32 PM, Peter Maydell wrote:
> The calculation of the length of TLB range invalidate operations
> in tlbi_aa64_range_get_length() is incorrect in two ways:
> * the NUM field is 5 bits, but we read only 4 bits
> * we miscalculate the page_shift value, because of an
> off-by-one error:
> TG 0b00 is invalid
> TG 0b01 is 4K granule size == 4096 == 2^12
> TG 0b10 is 16K granule size == 16384 == 2^14
> TG 0b11 is 64K granule size == 65536 == 2^16
> so page_shift should be (TG - 1) * 2 + 12
>
> Thanks to the bug report submitter Cha HyunSoo for identifying
> both these errors.
>
> Fixes: 84940ed82552d3c
> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/734
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> Not marked for-6.2 because this isn't a regression: we
> shipped the TLBI range invalidate support in 6.1.
> I have no repro case for this issue, but this doesn't break
> booting an aarch64 kernel, at least.
> ---
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2021-11-30 17:46 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-30 17:32 [PATCH] target/arm: Correct calculation of tlb range invalidate length Peter Maydell
2021-11-30 17:44 ` Richard Henderson [this message]
2021-11-30 20:10 ` Alex Bennée
2021-12-01 13:08 ` Philippe Mathieu-Daudé
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