From: Richard Henderson <richard.henderson@linaro.org>
To: David Hildenbrand <david@redhat.com>, qemu-devel@nongnu.org
Cc: qemu-s390x@nongnu.org, Cornelia Huck <cohuck@redhat.com>,
Thomas Huth <thuth@redhat.com>
Subject: Re: [PATCH v6 1/2] target/s390x: Implement the MVPG condition-code-option bit
Date: Fri, 12 Mar 2021 19:27:21 -0600 [thread overview]
Message-ID: <580976ca-ed71-f9ba-c384-1d3f223249ca@linaro.org> (raw)
In-Reply-To: <20210311194426.149044-2-david@redhat.com>
On 3/11/21 1:44 PM, David Hildenbrand wrote:
> + if (exc) {
> +#if !defined(CONFIG_USER_ONLY)
> + if (exc == PGM_PROTECTION) {
> + stq_phys(env_cpu(env)->as,
> + env->psa + offsetof(LowCore, trans_exc_code),
> + env->tlb_fill_tec);
> + tcg_s390_program_interrupt(env, PGM_PROTECTION, ra);
> + }
> +#endif
> + return 1;
> + }
Only the lo-core store should be within the ifdef.
Otherwise,
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2021-03-13 1:28 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-11 19:44 [PATCH v6 0/2] target/s390x: Implement the MVPG condition-code-option bit David Hildenbrand
2021-03-11 19:44 ` [PATCH v6 1/2] " David Hildenbrand
2021-03-13 1:27 ` Richard Henderson [this message]
2021-03-11 19:44 ` [PATCH v6 2/2] target/s390x: Store r1/r2 for page-translation exceptions during MVPG David Hildenbrand
2021-03-12 9:04 ` Thomas Huth
2021-03-13 1:29 ` Richard Henderson
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