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[174.21.70.228]) by smtp.gmail.com with ESMTPSA id m2sm11689958pgu.85.2021.05.24.07.22.26 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 24 May 2021 07:22:26 -0700 (PDT) Subject: Re: [PATCH 5/6] hw/arm/mps2-tz: Allow board to specify a boot RAM size To: Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org References: <20210510190844.17799-1-peter.maydell@linaro.org> <20210510190844.17799-6-peter.maydell@linaro.org> From: Richard Henderson Message-ID: <583ca871-e53a-aac7-ea0f-2a4e7812b03c@linaro.org> Date: Mon, 24 May 2021 07:22:24 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.8.1 MIME-Version: 1.0 In-Reply-To: <20210510190844.17799-6-peter.maydell@linaro.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::42d; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Devaraj Ranganna , Kumar Gala , Kevin Townsend , Jimmy Brisson Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 5/10/21 12:08 PM, Peter Maydell wrote: > Currently we model the ITCM in the AN547's RAMInfo list. This is incorrect > because this RAM is really a part of the SSE-300. We can't just delete > it from the RAMInfo list, though, because this would make boot_ram_size() > assert because it wouldn't be able to find an entry in the list covering > guest address 0. > > Allow a board to specify a boot RAM size manually if it doesn't have > any RAM itself at address 0 and is relying on the SSE for that, and > set the correct value for the AN547. The other boards can continue > to use the "look it up from the RAMInfo list" logic. > > Signed-off-by: Peter Maydell > --- > hw/arm/mps2-tz.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) Reviewed-by: Richard Henderson r~