From: Eric Blake <eblake@redhat.com>
To: "Philippe Mathieu-Daudé" <philmd@redhat.com>, qemu-devel@nongnu.org
Cc: Kevin Wolf <kwolf@redhat.com>,
Aleksandar Markovic <amarkovic@wavecomp.com>,
qemu-block@nongnu.org, qemu-trivial@nongnu.org,
Max Reitz <mreitz@redhat.com>,
Stefan Hajnoczi <stefanha@redhat.com>,
Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>,
Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [PATCH v2 2/3] hw/mips/gt64xxx: Remove dynamic field width from trace events
Date: Mon, 18 Nov 2019 13:15:54 -0600 [thread overview]
Message-ID: <5840cd82-2494-e61b-f61d-4713594e00a9@redhat.com> (raw)
In-Reply-To: <0a1b0182-d91e-ac9f-3c4e-aad53ee794b8@redhat.com>
On 11/18/19 1:10 PM, Philippe Mathieu-Daudé wrote:
>>>> - trace_gt64120_write("INTRCAUSE", size << 1, val);
>>>> + trace_gt64120_write("INTRCAUSE", size << 3, val);
>>>
>>> Again, this isn't mentioned in the commit message. Why are you
>>> changing parameter values?
>>>
>>>
>>>> +++ b/hw/mips/trace-events
>>>> @@ -1,4 +1,4 @@
>>>> # gt64xxx.c
>>>> -gt64120_read(const char *regname, int width, uint64_t value)
>>>> "gt64120 read %s value:0x%0*" PRIx64
>>>> -gt64120_write(const char *regname, int width, uint64_t value)
>>>> "gt64120 write %s value:0x%0*" PRIx64
>>>> +gt64120_read(const char *regname, int width, uint64_t value)
>>>> "gt64120 read %s width:%d value:0x%08" PRIx64
>>>> +gt64120_write(const char *regname, int width, uint64_t value)
>>>> "gt64120 write %s width:%d value:0x%08" PRIx64
>>>
>>> Huh, we were really broken - the old code (if passed to printf) would
>>> try to parse 4 parameters, even though it was only passed 3. But it
>>> looks like you still need a v3.
>>
>> Oops. I am surprise the compiler doesn't emit a warning here...
>
> I'm sorry I can't see the 4th parameter.
My fault for chasing a red herring. I guess I was mixing the three %
post-patch with the two % and one * pre-patch, and somehow mis-counting
three % plus one * as four arguments. But re-reading your confusion,
yes, there were only three parameters being consumed.
>
> Before: "gt64120 read %s value:0x%0*" PRIx64
>
> #1 's' for 'const char *regname'
> #2 '0*' for 'int width'
> #3 'x' for 'uint64_t value'
>
> After: "gt64120 read %s width:%d value:0x%08" PRIx64
>
> #1 's' for 'const char *regname'
> #2 'd' for 'int width'
> #3 '08x' for 'uint64_t value'
>
> Am I missing something?
Rather, I was.
--
Eric Blake, Principal Software Engineer
Red Hat, Inc. +1-919-301-3226
Virtualization: qemu.org | libvirt.org
next prev parent reply other threads:[~2019-11-18 19:17 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-08 14:40 [PATCH v2 0/3] hw: Remove dynamic field width from trace events Philippe Mathieu-Daudé
2019-11-08 14:40 ` [PATCH v2 1/3] hw/block/pflash: " Philippe Mathieu-Daudé
2019-11-08 15:56 ` Eric Blake
2019-11-14 21:26 ` Philippe Mathieu-Daudé
2019-11-18 19:21 ` Eric Blake
2019-11-18 20:39 ` Philippe Mathieu-Daudé
2019-11-08 14:40 ` [PATCH v2 2/3] hw/mips/gt64xxx: " Philippe Mathieu-Daudé
2019-11-08 15:58 ` Eric Blake
2019-11-14 21:24 ` Philippe Mathieu-Daudé
2019-11-18 19:10 ` Philippe Mathieu-Daudé
2019-11-18 19:15 ` Eric Blake [this message]
2019-11-08 14:40 ` [PATCH v2 3/3] trace: Forbid dynamic field width in event format Philippe Mathieu-Daudé
2019-11-08 16:07 ` Eric Blake
2019-11-18 18:42 ` Eric Blake
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