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([2a01:e0a:f0e:9070:527b:9dff:feef:3874]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3b8e0846777sm24460863f8f.48.2025.08.09.09.23.21 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 09 Aug 2025 09:23:22 -0700 (PDT) Message-ID: <58d3fc9a-08ca-4b38-b608-89c162c18b67@redhat.com> Date: Sat, 9 Aug 2025 18:23:21 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH RESEND 2/4] target/arm/kvm: Add QAPI struct ArmTargetImplCPU Content-Language: en-US To: Shameer Kolothum , qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, cohuck@redhat.com, sebott@redhat.com, berrange@redhat.com, maz@kernel.org, oliver.upton@linux.dev, armbru@redhat.com, linuxarm@huawei.com, wangzhou1@hisilicon.com, jiangkunkun@huawei.com, jonathan.cameron@huawei.com, salil.mehta@huawei.com, yangjinqian1@huawei.com, shameerali.kolothum.thodi@huawei.com References: <20250801074730.28329-1-shameerkolothum@gmail.com> <20250801074730.28329-3-shameerkolothum@gmail.com> From: Eric Auger In-Reply-To: <20250801074730.28329-3-shameerkolothum@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: eric.auger@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi Shameer, On 8/1/25 9:47 AM, Shameer Kolothum wrote: > From: Shameer Kolothum > > Introduce a QAPI‐defined struct (and its array) for target implementation > CPUs. This enables specifying target implementation CPU parameters > via -machine, for example: > > -M virt, \ >   impl-cpu.0.midr=1,impl-cpu.0.revidr=1,impl-cpu.0.aidr=1, \ >   impl-cpu.1.midr=2,impl-cpu.1.revidr=2,impl-cpu.1.aidr=0 > > Subsequent patch will make use of this by using object_property_add(), > allowing users to configure each target CPU’s midr, revidr, and aidr > fields directly from the command line. > > While at it, also provide a helper function to set the target CPUs. > > Signed-off-by: Shameer Kolothum > --- > qapi/machine.json | 34 ++++++++++++++++++++++++++++++++++ > target/arm/kvm.c | 16 ++++++++++++++++ > target/arm/kvm_arm.h | 8 ++++++++ > 3 files changed, 58 insertions(+) > > diff --git a/qapi/machine.json b/qapi/machine.json > index a6b8795b09..d6e0e3b2e3 100644 > --- a/qapi/machine.json > +++ b/qapi/machine.json > @@ -1898,3 +1898,37 @@ > { 'command': 'x-query-interrupt-controllers', > 'returns': 'HumanReadableText', > 'features': [ 'unstable' ]} > + > +## > +# @ArmTargetImplCPU: > +# > +# Info for a single target implementation CPU. > +# > +# @midr: MIDR value > +# @revidr: REVIDR value > +# @aidr: AIDR value > +# > +# Since: 10.2 > +## > +{ 'struct': 'ArmTargetImplCPU', > + 'data': { > + 'midr': 'uint64', > + 'revidr': 'uint64', > + 'aidr': 'uint64' > + } > +} > + > +## > +# @ArmTargetImplCPUs: > +# > +# List of target implementation CPUs. > +# > +# @target-cpus: List of ArmTargetImplCPU entries. > +# > +# Since: 10.2 > +## > +{ 'struct': 'ArmTargetImplCPUs', > + 'data': { > + 'target-cpus': ['ArmTargetImplCPU'] > + } > +} > diff --git a/target/arm/kvm.c b/target/arm/kvm.c > index eb04640b50..8f325c4ca4 100644 > --- a/target/arm/kvm.c > +++ b/target/arm/kvm.c > @@ -66,6 +66,9 @@ typedef struct ARMHostCPUFeatures { > > static ARMHostCPUFeatures arm_host_cpu_features; > > +static uint64_t target_impl_cpus_num; > +static ArmTargetImplCPU *target_impl_cpus; > + > /** > * kvm_arm_vcpu_init: > * @cpu: ARMCPU > @@ -2816,3 +2819,16 @@ void kvm_arm_enable_mte(Object *cpuobj, Error **errp) > cpu->kvm_mte = true; > } > } > + > +bool kvm_arm_set_target_impl_cpus(uint64_t num, ArmTargetImplCPU *cpus) > +{ > + > + if (target_impl_cpus_num) { > + return false; > + } > + > + target_impl_cpus_num = num; > + target_impl_cpus = cpus; see my question on 4/4 wrt array. Eric > + > + return true; > +} > diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h > index 3cd6447901..8754302333 100644 > --- a/target/arm/kvm_arm.h > +++ b/target/arm/kvm_arm.h > @@ -244,6 +244,8 @@ void kvm_arm_enable_mte(Object *cpuobj, Error **errp); > > int kvm_arm_get_writable_id_regs(ARMCPU *cpu, IdRegMap *idregmap); > > +bool kvm_arm_set_target_impl_cpus(uint64_t num, ArmTargetImplCPU *cpus); > + > #else > > /* > @@ -280,6 +282,12 @@ static inline int kvm_arm_get_writable_id_regs(ARMCPU *cpu, IdRegMap *idregmap) > return -ENOSYS; > } > > +static inline > +bool kvm_arm_set_target_impl_cpus(uint64_t num, ArmTargetImplCPU *cpus) > +{ > + return false; > +} > + > /* > * These functions should never actually be called without KVM support. > */