Re: [PATCH v3 2/2] target/loongarch: Fix emulation of float-point disable exception

[Richard Henderson <richard.henderson@linaro.org>]

On 11/4/22 15:05, Rui Wang wrote:
> +#ifndef CONFIG_USER_ONLY
> +#define CHECK_FPE do { \
> +    if ((ctx->base.tb->flags & HW_FLAGS_EUEN_FPE) == 0) { \
> +        generate_exception(ctx, EXCCODE_FPD); \
> +        return false; \
> +    } \
> +} while (0)
> +#else
> +#define CHECK_FPE
> +#endif
> +
>   static bool gen_fff(DisasContext *ctx, arg_fff *a,
>                       void (*func)(TCGv, TCGv_env, TCGv, TCGv))
>   {
> +    CHECK_FPE;

Oh, sorry, I just realized this is not quite correct: CHECK_FPE should return true, not false.

Returning false indicates that the instruction has not been matched, and the decoder 
should continue searching.  If we reach the end of the search space, we raise EXCCODE_INE. 
But here we have successfully matched the instruction, and have found that the register 
bank is disabled and should raise EXCCODE_FPD.

The difference will in practice not be visible, because the code that will be emitted to 
raise EXCCODE_INE will not be reached, because control flow will have already raised 
EXCCODE_FPD, but it would be better to not emit the dead code.


r~