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[187.189.51.144]) by smtp.gmail.com with ESMTPSA id m90sm2125016qte.44.2021.03.11.09.02.12 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 11 Mar 2021 09:02:13 -0800 (PST) Subject: Re: [PATCH v5 1/2] target/s390x: Implement the MVPG condition-code-option bit To: David Hildenbrand , qemu-devel@nongnu.org References: <20210311161747.129834-1-david@redhat.com> <20210311161747.129834-2-david@redhat.com> From: Richard Henderson Message-ID: <594f6840-2dad-89a2-9103-098e5f465ed4@linaro.org> Date: Thu, 11 Mar 2021 11:02:10 -0600 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.1 MIME-Version: 1.0 In-Reply-To: <20210311161747.129834-2-david@redhat.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::f2c; envelope-from=richard.henderson@linaro.org; helo=mail-qv1-xf2c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, Cornelia Huck , Thomas Huth Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 3/11/21 10:17 AM, David Hildenbrand wrote: > +#if !defined(CONFIG_USER_ONLY) > + if (env->tlb_fill_exc) { > + return env->tlb_fill_exc; > + } > +#else > + if (!haddr1) { > + env->__excp_addr = vaddr1; > + return PGM_ADDRESSING; > + } > +#endif For user-only, we can rely on TLB_INVALID_MASK, and check once for both pages. > @@ -858,13 +925,26 @@ uint32_t HELPER(mvpg)(CPUS390XState *env, uint64_t r0, uint64_t r1, uint64_t r2) > /* > * TODO: > * - Access key handling > - * - CC-option with surpression of page-translation exceptions > * - Store r1/r2 register identifiers at real location 162 > */ > - srca = access_prepare(env, r2, TARGET_PAGE_SIZE, MMU_DATA_LOAD, mmu_idx, > - ra); > - desta = access_prepare(env, r1, TARGET_PAGE_SIZE, MMU_DATA_STORE, mmu_idx, > - ra); > + exc = access_prepare_nf(&srca, env, cco, r2, TARGET_PAGE_SIZE, > + MMU_DATA_LOAD, mmu_idx, ra); > + if (exc) { > + return 2; > + } > + exc = access_prepare_nf(&desta, env, cco, r1, TARGET_PAGE_SIZE, > + MMU_DATA_STORE, mmu_idx, ra); > + if (exc) { > +#if !defined(CONFIG_USER_ONLY) > + if (exc == PGM_PROTECTION) { > + stq_phys(env_cpu(env)->as, > + env->psa + offsetof(LowCore, trans_exc_code), > + env->tlb_fill_tec); > + tcg_s390_program_interrupt(env, PGM_PROTECTION, ra); > + } > +#endif > + return 1; > + } > access_memmove(env, &desta, &srca, ra); > return 0; /* data moved */ > } If we're going to have an ifdef at all here, it should be around the entire helper -- this is a privileged operation. r~