From: Eric Auger <eric.auger@redhat.com>
To: Mostafa Saleh <smostafa@google.com>, qemu-devel@nongnu.org
Cc: jean-philippe@linaro.org, peter.maydell@linaro.org,
qemu-arm@nongnu.org, richard.henderson@linaro.org
Subject: Re: [RFC PATCH v2 09/11] hw/arm/smmuv3: Add stage-2 support in iova notifier
Date: Mon, 20 Mar 2023 17:57:52 +0100 [thread overview]
Message-ID: <599b0374-a8a0-8f47-cd3f-0e67801d6cd6@redhat.com> (raw)
In-Reply-To: <20230226220650.1480786-10-smostafa@google.com>
Hi,
On 2/26/23 23:06, Mostafa Saleh wrote:
> In smmuv3_notify_iova, read the granule based on translation stage
> and use VMID if valid value is sent.
>
> Signed-off-by: Mostafa Saleh <smostafa@google.com>
> ---
> hw/arm/smmuv3.c | 39 ++++++++++++++++++++++++++-------------
> hw/arm/trace-events | 2 +-
> 2 files changed, 27 insertions(+), 14 deletions(-)
>
> diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
> index 8c76a48c8d..7297f6adc1 100644
> --- a/hw/arm/smmuv3.c
> +++ b/hw/arm/smmuv3.c
> @@ -971,18 +971,21 @@ epilogue:
> * @mr: IOMMU mr region handle
> * @n: notifier to be called
> * @asid: address space ID or negative value if we don't care
> + * @vmid: virtual machine ID or negative value if we don't care
> * @iova: iova
> * @tg: translation granule (if communicated through range invalidation)
> * @num_pages: number of @granule sized pages (if tg != 0), otherwise 1
> */
> static void smmuv3_notify_iova(IOMMUMemoryRegion *mr,
> IOMMUNotifier *n,
> - int asid, dma_addr_t iova,
> - uint8_t tg, uint64_t num_pages)
> + int asid, int vmid,
> + dma_addr_t iova, uint8_t tg,
> + uint64_t num_pages)
> {
> SMMUDevice *sdev = container_of(mr, SMMUDevice, iommu);
> IOMMUTLBEvent event;
> uint8_t granule;
> + SMMUv3State *s = sdev->smmu;
I am not sure notifiers are likely to be registered in the S2 case
because it is mostly meant to integrate with vhost or VFIO. The code in
this patch would rather prepare for nested stage support I guess, I
don't think it can harm.
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Eric
>
> if (!tg) {
> SMMUEventInfo event = {.inval_ste_allowed = true};
> @@ -997,11 +1000,20 @@ static void smmuv3_notify_iova(IOMMUMemoryRegion *mr,
> return;
> }
>
> - tt = select_tt(cfg, iova);
> - if (!tt) {
> + if (vmid >= 0 && cfg->s2cfg.vmid != vmid) {
> return;
> }
> - granule = tt->granule_sz;
> +
> + if (STAGE1_SUPPORTED(s)) {
> + tt = select_tt(cfg, iova);
> + if (!tt) {
> + return;
> + }
> + granule = tt->granule_sz;
> + } else {
> + granule = cfg->s2cfg.granule_sz;
> + }
> +
> } else {
> granule = tg * 2 + 10;
> }
> @@ -1015,9 +1027,10 @@ static void smmuv3_notify_iova(IOMMUMemoryRegion *mr,
> memory_region_notify_iommu_one(n, &event);
> }
>
> -/* invalidate an asid/iova range tuple in all mr's */
> -static void smmuv3_inv_notifiers_iova(SMMUState *s, int asid, dma_addr_t iova,
> - uint8_t tg, uint64_t num_pages)
> +/* invalidate an asid/vmid/iova range tuple in all mr's */
> +static void smmuv3_inv_notifiers_iova(SMMUState *s, int asid, int vmid,
> + dma_addr_t iova, uint8_t tg,
> + uint64_t num_pages)
> {
> SMMUDevice *sdev;
>
> @@ -1025,11 +1038,11 @@ static void smmuv3_inv_notifiers_iova(SMMUState *s, int asid, dma_addr_t iova,
> IOMMUMemoryRegion *mr = &sdev->iommu;
> IOMMUNotifier *n;
>
> - trace_smmuv3_inv_notifiers_iova(mr->parent_obj.name, asid, iova,
> - tg, num_pages);
> + trace_smmuv3_inv_notifiers_iova(mr->parent_obj.name, asid, vmid,
> + iova, tg, num_pages);
>
> IOMMU_NOTIFIER_FOREACH(n, mr) {
> - smmuv3_notify_iova(mr, n, asid, iova, tg, num_pages);
> + smmuv3_notify_iova(mr, n, asid, vmid, iova, tg, num_pages);
> }
> }
> }
> @@ -1060,7 +1073,7 @@ static void smmuv3_range_inval(SMMUState *s, Cmd *cmd)
>
> if (!tg) {
> trace_smmuv3_range_inval(vmid, asid, addr, tg, 1, ttl, leaf);
> - smmuv3_inv_notifiers_iova(s, asid, addr, tg, 1);
> + smmuv3_inv_notifiers_iova(s, asid, vmid, addr, tg, 1);
> smmu_iotlb_inv_iova(s, asid, vmid, addr, tg, 1, ttl);
> return;
> }
> @@ -1078,7 +1091,7 @@ static void smmuv3_range_inval(SMMUState *s, Cmd *cmd)
>
> num_pages = (mask + 1) >> granule;
> trace_smmuv3_range_inval(vmid, asid, addr, tg, num_pages, ttl, leaf);
> - smmuv3_inv_notifiers_iova(s, asid, addr, tg, num_pages);
> + smmuv3_inv_notifiers_iova(s, asid, vmid, addr, tg, num_pages);
> smmu_iotlb_inv_iova(s, asid, vmid, addr, tg, num_pages, ttl);
> addr += mask + 1;
> }
> diff --git a/hw/arm/trace-events b/hw/arm/trace-events
> index f8fdf1ca9f..cdc1ea06a8 100644
> --- a/hw/arm/trace-events
> +++ b/hw/arm/trace-events
> @@ -53,5 +53,5 @@ smmuv3_cmdq_tlbi_s12_vmid(uint16_t vmid) "vmid=%d"
> smmuv3_config_cache_inv(uint32_t sid) "Config cache INV for sid=0x%x"
> smmuv3_notify_flag_add(const char *iommu) "ADD SMMUNotifier node for iommu mr=%s"
> smmuv3_notify_flag_del(const char *iommu) "DEL SMMUNotifier node for iommu mr=%s"
> -smmuv3_inv_notifiers_iova(const char *name, uint16_t asid, uint64_t iova, uint8_t tg, uint64_t num_pages) "iommu mr=%s asid=%d iova=0x%"PRIx64" tg=%d num_pages=0x%"PRIx64
> +smmuv3_inv_notifiers_iova(const char *name, uint16_t asid, uint16_t vmid, uint64_t iova, uint8_t tg, uint64_t num_pages) "iommu mr=%s asid=%d vmid=%d iova=0x%"PRIx64" tg=%d num_pages=0x%"PRIx64
>
next prev parent reply other threads:[~2023-03-20 16:58 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-02-26 22:06 [RFC PATCH v2 00/11] Add stage-2 translation for SMMUv3 Mostafa Saleh
2023-02-26 22:06 ` [RFC PATCH v2 01/11] hw/arm/smmuv3: Add missing fields for IDR0 Mostafa Saleh
2023-02-26 22:06 ` [RFC PATCH v2 02/11] hw/arm/smmuv3: Update translation config to hold stage-2 Mostafa Saleh
2023-03-17 11:37 ` Eric Auger
2023-03-17 14:43 ` Mostafa Saleh
2023-03-17 17:36 ` Eric Auger
2023-02-26 22:06 ` [RFC PATCH v2 03/11] hw/arm/smmuv3: Refactor stage-1 PTW Mostafa Saleh
2023-03-17 18:31 ` Eric Auger
2023-03-19 8:38 ` Mostafa Saleh
2023-02-26 22:06 ` [RFC PATCH v2 04/11] hw/arm/smmuv3: Add page table walk for stage-2 Mostafa Saleh
2023-03-20 14:56 ` Eric Auger
2023-03-20 18:52 ` Mostafa Saleh
2023-02-26 22:06 ` [RFC PATCH v2 05/11] hw/arm/smmuv3: Parse STE config " Mostafa Saleh
2023-03-20 15:14 ` Eric Auger
2023-03-20 19:11 ` Mostafa Saleh
2023-02-26 22:06 ` [RFC PATCH v2 06/11] hw/arm/smmuv3: Make TLB lookup work " Mostafa Saleh
2023-03-20 16:05 ` Eric Auger
2023-03-20 19:14 ` Mostafa Saleh
2023-02-26 22:06 ` [RFC PATCH v2 07/11] hw/arm/smmuv3: Add VMID to tlb tagging Mostafa Saleh
2023-03-20 16:16 ` Eric Auger
2023-02-26 22:06 ` [RFC PATCH v2 08/11] hw/arm/smmuv3: Add CMDs related to stage-2 Mostafa Saleh
2023-03-20 16:51 ` Eric Auger
2023-03-20 19:29 ` Mostafa Saleh
2023-02-26 22:06 ` [RFC PATCH v2 09/11] hw/arm/smmuv3: Add stage-2 support in iova notifier Mostafa Saleh
2023-03-20 16:57 ` Eric Auger [this message]
2023-02-26 22:06 ` [RFC PATCH v2 10/11] hw/arm/smmuv3: Populate OAS based on CPU PARANGE Mostafa Saleh
2023-03-20 17:12 ` Eric Auger
2023-03-21 13:06 ` Mostafa Saleh
2023-03-21 13:23 ` Eric Auger
2023-03-21 13:29 ` Mostafa Saleh
2023-03-21 13:34 ` Eric Auger
2023-03-21 13:34 ` Peter Maydell
2023-03-21 13:42 ` Mostafa Saleh
2023-03-21 13:45 ` Eric Auger
2023-03-21 13:54 ` Mostafa Saleh
2023-03-21 14:08 ` Peter Maydell
2023-02-26 22:06 ` [RFC PATCH v2 11/11] hw/arm/smmuv3: Add knob to choose translation stage and enable stage-2 Mostafa Saleh
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