From: Richard Henderson <richard.henderson@linaro.org>
To: Christoph Muellner <christoph.muellner@vrull.eu>,
qemu-riscv@nongnu.org, qemu-devel@nongnu.org,
Alistair Francis <alistair.francis@wdc.com>,
Bin Meng <bin.meng@windriver.com>,
Philipp Tomsich <philipp.tomsich@vrull.eu>,
Palmer Dabbelt <palmer@dabbelt.com>,
Jeff Law <jeffreyalaw@gmail.com>,
Tsukasa OI <research_trasio@irq.a4lg.com>,
liweiwei@iscas.ac.cn,
Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
Liu Zhiwei <zhiwei_liu@linux.alibaba.com>,
Rob Bradford <rbradford@rivosinc.com>
Subject: Re: [PATCH v4 2/3] target/riscv: Use float64_to_int64_modulo for fcvtmod.w.d
Date: Fri, 30 Jun 2023 11:22:13 +0200 [thread overview]
Message-ID: <599e9042-4e58-d468-940c-f8a8ee1edf5d@linaro.org> (raw)
In-Reply-To: <20230630091303.1676486-3-christoph.muellner@vrull.eu>
On 6/30/23 11:13, Christoph Muellner wrote:
> From: Christoph Müllner <christoph.muellner@vrull.eu>
>
> For the most part we can use the new generic routine,
> though exceptions need some post-processing.
>
> Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
> ---
> target/riscv/fpu_helper.c | 78 ++++++++++++++-------------------------
> 1 file changed, 27 insertions(+), 51 deletions(-)
>
> diff --git a/target/riscv/fpu_helper.c b/target/riscv/fpu_helper.c
> index 289b3bbea5..0f897cf072 100644
> --- a/target/riscv/fpu_helper.c
> +++ b/target/riscv/fpu_helper.c
> @@ -482,70 +482,46 @@ target_ulong helper_fcvt_w_d(CPURISCVState *env, uint64_t frs1)
> return float64_to_int32(frs1, &env->fp_status);
> }
>
> +/* T floating (double) */
> +static inline float64 t_to_float64(uint64_t a)
> +{
> + /* Memory format is the same as float64 */
> + CPU_DoubleU r;
> + r.ll = a;
> + return r.d;
> +}
You don't need this. Nor does Alpha anymore, come to that.
float64 is uint64_t now, always.
> + int64_t ret;
> + int32_t ret32;
> + uint32_t e_old, e_new;
> + float64 fvalue;
> +
> + e_old = get_float_exception_flags(status);
> + set_float_exception_flags(0, status);
> + fvalue = t_to_float64(value);
> + ret = float64_to_int32_modulo(fvalue, float_round_to_zero, status);
> + e_new = get_float_exception_flags(status);
> +
> + /* Map the flags to the specified ones. */
> + if (e_new & float_flag_inexact) {
> + e_new = float_flag_inexact;
> + } else if (e_new) {
> + e_new = float_flag_invalid;
> }
Why? Generic code will not set both inexact and invalid.
So this is a nop.
Removing that, all of your fp flags handling can go away.
> /* Truncate to 32-bits. */
> - int32_t ret32 = (int32_t)ret;
> + ret32 = (int32_t)ret;
>
> /* If the truncation drops bits then raise NV. */
> if ((uint64_t)ret32 != ret)
This will never fail, because you used float64_to_int32_modulo, which already returns int32_t.
But we have already raised invalid for overflow, so this can go away as well.
Finally, this patch must be merged with the previous, which introduced this function.
r~
next prev parent reply other threads:[~2023-06-30 9:22 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-30 9:13 [PATCH v4 0/3] riscv: Add support for the Zfa extension Christoph Muellner
2023-06-30 9:13 ` [PATCH v4 1/3] " Christoph Muellner
2023-06-30 9:53 ` Richard Henderson
2023-06-30 9:57 ` Christoph Müllner
2023-06-30 9:13 ` [PATCH v4 2/3] target/riscv: Use float64_to_int64_modulo for fcvtmod.w.d Christoph Muellner
2023-06-30 9:22 ` Richard Henderson [this message]
2023-06-30 9:55 ` Christoph Müllner
2023-06-30 9:13 ` [PATCH v4 3/3] DO NOT MERGE: tests/tcg/riscv64: Add test " Christoph Muellner
2023-06-30 9:46 ` Richard Henderson
2023-06-30 11:52 ` Christoph Müllner
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