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Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH v4 2/3] target/riscv: Use float64_to_int64_modulo for fcvtmod.w.d Content-Language: en-US To: Christoph Muellner , qemu-riscv@nongnu.org, qemu-devel@nongnu.org, Alistair Francis , Bin Meng , Philipp Tomsich , Palmer Dabbelt , Jeff Law , Tsukasa OI , liweiwei@iscas.ac.cn, Daniel Henrique Barboza , Liu Zhiwei , Rob Bradford References: <20230630091303.1676486-1-christoph.muellner@vrull.eu> <20230630091303.1676486-3-christoph.muellner@vrull.eu> From: Richard Henderson In-Reply-To: <20230630091303.1676486-3-christoph.muellner@vrull.eu> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=richard.henderson@linaro.org; helo=mail-wr1-x436.google.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.093, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 6/30/23 11:13, Christoph Muellner wrote: > From: Christoph Müllner > > For the most part we can use the new generic routine, > though exceptions need some post-processing. > > Signed-off-by: Christoph Müllner > --- > target/riscv/fpu_helper.c | 78 ++++++++++++++------------------------- > 1 file changed, 27 insertions(+), 51 deletions(-) > > diff --git a/target/riscv/fpu_helper.c b/target/riscv/fpu_helper.c > index 289b3bbea5..0f897cf072 100644 > --- a/target/riscv/fpu_helper.c > +++ b/target/riscv/fpu_helper.c > @@ -482,70 +482,46 @@ target_ulong helper_fcvt_w_d(CPURISCVState *env, uint64_t frs1) > return float64_to_int32(frs1, &env->fp_status); > } > > +/* T floating (double) */ > +static inline float64 t_to_float64(uint64_t a) > +{ > + /* Memory format is the same as float64 */ > + CPU_DoubleU r; > + r.ll = a; > + return r.d; > +} You don't need this. Nor does Alpha anymore, come to that. float64 is uint64_t now, always. > + int64_t ret; > + int32_t ret32; > + uint32_t e_old, e_new; > + float64 fvalue; > + > + e_old = get_float_exception_flags(status); > + set_float_exception_flags(0, status); > + fvalue = t_to_float64(value); > + ret = float64_to_int32_modulo(fvalue, float_round_to_zero, status); > + e_new = get_float_exception_flags(status); > + > + /* Map the flags to the specified ones. */ > + if (e_new & float_flag_inexact) { > + e_new = float_flag_inexact; > + } else if (e_new) { > + e_new = float_flag_invalid; > } Why? Generic code will not set both inexact and invalid. So this is a nop. Removing that, all of your fp flags handling can go away. > /* Truncate to 32-bits. */ > - int32_t ret32 = (int32_t)ret; > + ret32 = (int32_t)ret; > > /* If the truncation drops bits then raise NV. */ > if ((uint64_t)ret32 != ret) This will never fail, because you used float64_to_int32_modulo, which already returns int32_t. But we have already raised invalid for overflow, so this can go away as well. Finally, this patch must be merged with the previous, which introduced this function. r~