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From: Richard Henderson <richard.henderson@linaro.org>
To: Ilya Leoshkevich <iii@linux.ibm.com>, qemu-devel@nongnu.org
Cc: stefanha@redhat.com, "Alex Bennée" <alex.bennee@linaro.org>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: Re: [PULL 15/20] include/hw/core: Create struct CPUJumpCache
Date: Fri, 28 Oct 2022 07:02:49 +1000	[thread overview]
Message-ID: <59b2016d-949c-13aa-30df-050fc720bdae@linaro.org> (raw)
In-Reply-To: <20221027144414.bwc5lklt7dx2wc3j@heavy>

On 10/28/22 00:44, Ilya Leoshkevich wrote:
> Putting CPUJumpCache inside CPUState made problem go away:
> 
> diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
> index 18ca701b443..3ea528566c3 100644
> --- a/include/hw/core/cpu.h
> +++ b/include/hw/core/cpu.h
> @@ -32,6 +32,7 @@
>   #include "qemu/thread.h"
>   #include "qemu/plugin.h"
>   #include "qom/object.h"
> +#include "accel/tcg/tb-jmp-cache.h"
>   
>   typedef int (*WriteCoreDumpFunction)(const void *buf, size_t size,
>                                        void *opaque);
> @@ -366,7 +367,7 @@ struct CPUState {
>       CPUArchState *env_ptr;
>       IcountDecr *icount_decr_ptr;
>   
> -    CPUJumpCache *tb_jmp_cache;
> +    CPUJumpCache tb_jmp_cache;

Yes, well.  That structure is quite large (128kB?) and I had been hoping to (1) save that 
extra memory for e.g. KVM and (2) hide the tcg-specific stuff from core.

But clearly something went wrong during some threadedness with your test case.


>   void tcg_flush_jmp_cache(CPUState *cpu)
>   {
> -    CPUJumpCache *jc = cpu->tb_jmp_cache;
>   
> -    if (likely(jc)) {
> -        for (int i = 0; i < TB_JMP_CACHE_SIZE; i++) {
> -            qatomic_set(&jc->array[i].tb, NULL);
> -        }
> -    } else {
> -        /* This should happen once during realize, and thus never race. */
> -        jc = g_new0(CPUJumpCache, 1);
> -        jc = qatomic_xchg(&cpu->tb_jmp_cache, jc);
> -        assert(jc == NULL);
>       }
>   }
>   
> So there must be a race in tcg_flush_jmp_cache() after all?

If there had been a race here, we would abort with the assert.
It must be something else...


r~



  reply	other threads:[~2022-10-27 21:05 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-04 19:52 [PULL 00/20] tcg patch queue Richard Henderson
2022-10-04 19:52 ` [PULL 01/20] cpu: cache CPUClass in CPUState for hot code paths Richard Henderson
2022-10-04 19:52 ` [PULL 02/20] hw/core/cpu-sysemu: used cached class in cpu_asidx_from_attrs Richard Henderson
2022-10-04 19:52 ` [PULL 03/20] cputlb: used cached CPUClass in our hot-paths Richard Henderson
2022-10-04 19:52 ` [PULL 04/20] accel/tcg: Rename CPUIOTLBEntry to CPUTLBEntryFull Richard Henderson
2022-10-04 19:52 ` [PULL 05/20] accel/tcg: Drop addr member from SavedIOTLB Richard Henderson
2022-10-04 19:52 ` [PULL 06/20] accel/tcg: Suppress auto-invalidate in probe_access_internal Richard Henderson
2022-10-04 19:52 ` [PULL 07/20] accel/tcg: Introduce probe_access_full Richard Henderson
2022-10-04 19:52 ` [PULL 08/20] accel/tcg: Introduce tlb_set_page_full Richard Henderson
2022-10-04 19:52 ` [PULL 09/20] include/exec: Introduce TARGET_PAGE_ENTRY_EXTRA Richard Henderson
2022-10-04 19:52 ` [PULL 10/20] accel/tcg: Remove PageDesc code_bitmap Richard Henderson
2022-10-04 19:52 ` [PULL 11/20] accel/tcg: Use bool for page_find_alloc Richard Henderson
2022-10-04 19:52 ` [PULL 12/20] accel/tcg: Use DisasContextBase in plugin_gen_tb_start Richard Henderson
2022-10-04 19:52 ` [PULL 13/20] accel/tcg: Do not align tb->page_addr[0] Richard Henderson
2022-10-04 19:52 ` [PULL 14/20] accel/tcg: Inline tb_flush_jmp_cache Richard Henderson
2022-10-04 19:52 ` [PULL 15/20] include/hw/core: Create struct CPUJumpCache Richard Henderson
2022-10-27 14:18   ` Ilya Leoshkevich
2022-10-27 14:44     ` Ilya Leoshkevich
2022-10-27 21:02       ` Richard Henderson [this message]
2022-10-27 20:46     ` Richard Henderson
2022-10-04 19:52 ` [PULL 16/20] hw/core: Add CPUClass.get_pc Richard Henderson
2022-10-04 19:52 ` [PULL 17/20] accel/tcg: Introduce tb_pc and log_pc Richard Henderson
2022-10-04 19:52 ` [PULL 18/20] accel/tcg: Introduce TARGET_TB_PCREL Richard Henderson
2022-10-04 19:52 ` [PULL 19/20] tcg/ppc: Optimize 26-bit jumps Richard Henderson
2022-12-15 21:33   ` Michael Tokarev
2022-12-15 21:37     ` Michael Tokarev
2022-12-15 23:22     ` Richard Henderson
2022-10-04 19:52 ` [PULL 20/20] target/sh4: Fix TB_FLAG_UNALIGN Richard Henderson
2022-10-20 15:48   ` Alex Bennée
2022-10-05 17:55 ` [PULL 00/20] tcg patch queue Stefan Hajnoczi

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