From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-devel@nongnu.org
Subject: Re: [PATCH v2 6/9] tcg/aarch64: Support TCG_TARGET_SIGNED_ADDR32
Date: Thu, 3 Mar 2022 05:43:30 -1000 [thread overview]
Message-ID: <59dcee91-aec2-50b8-28a6-cbebfc9fb7ee@linaro.org> (raw)
In-Reply-To: <CAFEAcA_wCDP=-=FFp_hKE9r-5Vz7RMxpQV2BkH63cpv1oZRjbw@mail.gmail.com>
On 3/3/22 05:04, Peter Maydell wrote:
>> if (USE_GUEST_BASE) {
>> tcg_out_qemu_ld_direct(s, memop, ext, data_reg,
>> - TCG_REG_GUEST_BASE, otype, addr_reg);
>> + TCG_REG_GUEST_BASE, option, addr_reg);
>> } else {
>> tcg_out_qemu_ld_direct(s, memop, ext, data_reg,
>> - addr_reg, TCG_TYPE_I64, TCG_REG_XZR);
>> + addr_reg, option, TCG_REG_XZR);
>
> This doesn't look right. 'option' specifies how we extend the offset
> register, but here that is XZR, which is 0 no matter how we choose
> to extend it, whereas we aren't going to be extending the base
> register 'addr_reg' which is what we do need to either zero or
> sign extend. Unfortunately we can't just flip addr_reg and XZR
> around, because XZR isn't valid as the base reg.
>
> Is this a pre-existing bug? If addr_reg needs zero extending
> we won't be doing that.
It's just confusing, because stuff is hidden in macros:
#define USE_GUEST_BASE (guest_base != 0 || TARGET_LONG_BITS == 32)
We *always* use TCG_REG_GUEST_BASE when we require an extension, so the else case you
point out will always have option == 3 /* LSL #0 */.
Previously I had a named constant I could use here, but I didn't create names for the full
'option' field being filled, so I thought it clearer to just pass along the variable.
Would it be clearer as
3 /* LSL #0 */
or with some LDST_OPTION_LSL0?
r~
next prev parent reply other threads:[~2022-03-03 16:04 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-27 2:04 [PATCH v2 0/9] tcg: support 32-bit guest addresses as signed Richard Henderson
2022-02-27 2:04 ` [PATCH v2 1/9] tcg: Add TCG_TARGET_SIGNED_ADDR32 Richard Henderson
2022-02-27 2:04 ` [PATCH v2 2/9] accel/tcg: Split out g2h_tlbe Richard Henderson
2022-02-27 2:04 ` [PATCH v2 3/9] accel/tcg: Support TCG_TARGET_SIGNED_ADDR32 for softmmu Richard Henderson
2022-02-27 22:32 ` Philippe Mathieu-Daudé
2022-03-03 15:14 ` Peter Maydell
2022-02-27 2:04 ` [PATCH v2 4/9] accel/tcg: Add guest_base_signed_addr32 for user-only Richard Henderson
2022-03-03 15:14 ` Peter Maydell
2022-02-27 2:04 ` [PATCH v2 5/9] linux-user: Support TCG_TARGET_SIGNED_ADDR32 Richard Henderson
2022-02-27 22:48 ` Philippe Mathieu-Daudé
2022-02-27 2:04 ` [PATCH v2 6/9] tcg/aarch64: " Richard Henderson
2022-03-03 15:04 ` Peter Maydell
2022-03-03 15:43 ` Richard Henderson [this message]
2022-03-03 16:19 ` Peter Maydell
2022-02-27 2:04 ` [PATCH v2 7/9] tcg/mips: " Richard Henderson
2022-02-27 22:51 ` Philippe Mathieu-Daudé
2022-02-27 2:04 ` [PATCH v2 8/9] tcg/riscv: " Richard Henderson
2022-02-27 2:04 ` [PATCH v2 9/9] tcg/loongarch64: " Richard Henderson
2022-02-27 22:52 ` Philippe Mathieu-Daudé
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