Re: [PATCH 3/7] hw/ppc: Handle stash command in PowerNV SBE

[Harsh Prateek Bora <harshpb@linux.ibm.com>]

On 2/17/25 12:49, Aditya Gupta wrote:
> Earlier since the SBE_CMD_STASH_MPIPL_CONFIG command was not handled, so
> skiboot used to not get any response from SBE:
> 
>      [  106.350742821,3] SBE: Message timeout [chip id = 0], cmd = d7, subcmd = 7
>      [  106.352067746,3] SBE: Failed to send stash MPIPL config [chip id = 0x0, rc = 254]
> 
> Fix this by handling the command in PowerNV SBE, and sending a response so
> skiboot knows SBE has handled the STASH command
> 
> The stashed skiboot base is later used to access the relocated MDST/MDDT
> tables when MPIPL is implemented.
> 
> The purpose of stashing relocated base address is explained in following
> skiboot commit:
> 
>      author Vasant Hegde <hegdevasant@linux.vnet.ibm.com> Fri Jul 12 16:47:51 2019 +0530
>      committer Oliver O'Halloran <oohall@gmail.com> Thu Aug 15 17:53:39 2019 +1000
> 
>      SBE: Send OPAL relocated base address to SBE
> 
>        OPAL relocates itself during boot. During memory preserving IPL hostboot needs
>        to access relocated OPAL base address to get MDST, MDDT tables. Hence send
>        relocated base address to SBE via 'stash MPIPL config' chip-op. During next
>        IPL SBE will send stashed data to hostboot... so that hostboot can access
>        these data.
> 
> Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>
> ---
>   hw/ppc/pnv_sbe.c         | 25 +++++++++++++++++++++++++
>   include/hw/ppc/pnv_sbe.h |  3 +++
>   2 files changed, 28 insertions(+)
> 
> diff --git a/hw/ppc/pnv_sbe.c b/hw/ppc/pnv_sbe.c
> index a6bf13650f2d..79818177fc36 100644
> --- a/hw/ppc/pnv_sbe.c
> +++ b/hw/ppc/pnv_sbe.c
> @@ -82,6 +82,8 @@
>   #define SBE_CONTROL_REG_S0              PPC_BIT(14)
>   #define SBE_CONTROL_REG_S1              PPC_BIT(15)
>   
> +static uint64_t mpipl_skiboot_base = 0x30000000 /*default SKIBOOT_BASE*/;
> +
>   static void pnv_sbe_set_host_doorbell(PnvSBE *sbe, uint64_t val)
>   {
>       val &= SBE_HOST_RESPONSE_MASK; /* Is this right? What does HW do? */
> @@ -281,6 +283,29 @@ static void do_sbe_msg(PnvSBE *sbe)
>               timer_del(sbe->timer);
>           }
>           break;
> +    case SBE_CMD_STASH_MPIPL_CONFIG:
> +        /* key = sbe->mbox[1] */
> +        switch (sbe->mbox[1]) {
> +        case SBE_STASH_KEY_SKIBOOT_BASE:
> +            mpipl_skiboot_base = sbe->mbox[2];
> +            qemu_log_mask(LOG_UNIMP,
> +                "Stashing skiboot base: 0x%lx\n", mpipl_skiboot_base);
> +
> +            /*
> +             * Set the response register.
> +             *
> +             * Currently setting the same sequence number in
> +             * response as we got in the request.
> +             */
> +            sbe->mbox[4] = sbe->mbox[0];    /* sequence number */
> +            pnv_sbe_set_host_doorbell(sbe,
> +                    sbe->host_doorbell | SBE_HOST_RESPONSE_WAITING);
> +
> +            break;
> +        default:
> +            qemu_log_mask(LOG_UNIMP, "SBE Unimplemented command: 0x%x\n", cmd);

Unimplemented SBE_CMD_STASH_MPIPL_CONFIG key ?

> +        }
> +        break;
>       default:
>           qemu_log_mask(LOG_UNIMP, "SBE Unimplemented command: 0x%x\n", cmd);
>       }
> diff --git a/include/hw/ppc/pnv_sbe.h b/include/hw/ppc/pnv_sbe.h
> index b6b378ad14c7..f6cbcf990ed9 100644
> --- a/include/hw/ppc/pnv_sbe.h
> +++ b/include/hw/ppc/pnv_sbe.h
> @@ -53,4 +53,7 @@ struct PnvSBEClass {
>       const MemoryRegionOps *xscom_mbox_ops;
>   };
>   
> +/* Helper to access stashed SKIBOOT_BASE */
> +bool pnv_sbe_mpipl_skiboot_base(void);
> +
>   #endif /* PPC_PNV_SBE_H */