From: Shannon Zhao <zhaoshenglong@huawei.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-arm <qemu-arm@nongnu.org>,
QEMU Developers <qemu-devel@nongnu.org>,
Eric Auger <eric.auger@redhat.com>
Subject: Re: [Qemu-devel] [Qemu-arm] [PATCH v2 2/2] arm_gicv3_kvm: kvm_dist_get/put: skip the registers banked by GICR
Date: Wed, 21 Mar 2018 16:00:48 +0800 [thread overview]
Message-ID: <5AB21130.2020309@huawei.com> (raw)
In-Reply-To: <CAFEAcA-Ct3qa0OFZ4U+9RH68SQJgmkxJKKS5e+if_MuL2pSu3A@mail.gmail.com>
On 2018/3/20 19:54, Peter Maydell wrote:
> On 20 March 2018 at 11:36, Shannon Zhao <zhaoshenglong@huawei.com> wrote:
>>
>>
>> On 2018/3/20 19:22, Peter Maydell wrote:
>>> On 20 March 2018 at 07:26, Shannon Zhao <zhaoshenglong@huawei.com> wrote:
>>>> While we skip the GIC_INTERNAL irqs, we don't change the register offset
>>>> accordingly. This will overlap the GICR registers value and leave the
>>>> last GIC_INTERNAL irq's registers out of update.
>>>>
>>>> Fix this by skipping the registers banked by GICR.
>>>>
>>>
>>> I'm still not entirely sure what the underlying problem
>>> you're trying to fix is...
>>>
>>> Do we fail to correctly migrate a VM without this change?
>>> Does the code work on some host CPU/GIC implementations but
>>> not others? Is this just improving efficiency by avoiding
>>> doing some unnecessary work?
>>>
>> When we reboot a VM and before entering uefi or guest kernel, we expect
>> all these registers staying at the initial state. But currently these
>> registers of the last 32 irqs are not reset. For example, the PRIORITY
>> of irq from 32 to 255 is 0 but the PRIORITY of irq from 256 to 287 is
>> 0xa0(Linux kernel set the PRIORITY to 0xa0 by default).
>>
>> When migrating a VM, since we don't save and restore the registers of
>> the last 32 irq, so the PRIORITY is 0 while we expecting 0xa0.
>> And also it will overlap the PRIORITY of SGIs and PPIs.
>>
>> We don't fail to migrate a vm since currently we don't use the last 32
>> irqs in virt machine. But the bug is still there.
>
> Oh, I see, the number of registers we transfer is accounting
> for the first N registers in the bank not being used, but the
> first register offset to transfer wasn't.
>
> Can you still successfully migrate a VM from a QEMU version
> without this bugfix to one with the bugfix ?
>
I've tested this case. I can migrate a VM between these two versions.
Thanks,
--
Shannon
next prev parent reply other threads:[~2018-03-21 8:01 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-20 7:26 [Qemu-devel] [PATCH v2 0/2] two fixes for KVM GICv3 dist get/put functions Shannon Zhao
2018-03-20 7:26 ` [Qemu-devel] [PATCH v2 1/2] arm_gicv3_kvm: increase clroffset accordingly Shannon Zhao
2018-03-20 8:07 ` Auger Eric
2018-03-20 7:26 ` [Qemu-devel] [PATCH v2 2/2] arm_gicv3_kvm: kvm_dist_get/put: skip the registers banked by GICR Shannon Zhao
2018-03-20 8:42 ` Auger Eric
2018-03-21 8:33 ` Shannon Zhao
2018-03-20 11:22 ` [Qemu-devel] [Qemu-arm] " Peter Maydell
2018-03-20 11:36 ` Shannon Zhao
2018-03-20 11:54 ` Peter Maydell
2018-03-21 8:00 ` Shannon Zhao [this message]
2018-03-23 12:08 ` Peter Maydell
2018-03-29 10:54 ` Peter Maydell
2018-03-29 11:11 ` Dr. David Alan Gilbert
2018-04-05 14:22 ` Peter Maydell
2018-04-06 9:36 ` Peter Maydell
2018-04-08 1:50 ` Shannon Zhao
2018-05-22 9:13 ` Peter Maydell
2018-05-24 6:29 ` Shannon Zhao
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