From: Bernhard Beschow <shentey@gmail.com>
To: Richard Henderson <richard.henderson@linaro.org>,
Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-devel@nongnu.org
Subject: Re: [PULL 17/20] target/arm: Do memory type alignment check when translation disabled
Date: Mon, 27 May 2024 17:49:26 +0000 [thread overview]
Message-ID: <5E575AFE-7E8F-4CEA-999E-30D9881104A8@gmail.com> (raw)
In-Reply-To: <b871bf81-ed1a-4720-ae70-9dbc517f155e@linaro.org>
Am 27. Mai 2024 16:20:44 UTC schrieb Richard Henderson <richard.henderson@linaro.org>:
>On 5/27/24 08:29, Bernhard Beschow wrote:
>> I think the kernel's output indicates that the MMU is active:
>>
>> [7e849b05] *pgd=2c552831, *pte=109eb34f, *ppte=109eb83f
>>
>> AFAIU, the value in brackets is a virtual address while the pte's are physical ones. Furthermore, the `info mtree` QMP command tells that the physical addresses are RAM addresses:
>>
>> 0000000010000000-000000002fffffff (prio 0, ram): sabrelite.ram
>>
>> So I think we can conclude this to be "normal memory" to speak in ARM terms.
>
>Normal and Device are attributes on the page table entry.
>See section G5.7 Memory region attributes in the Arm ARM.
>
>But it's unlikely that the Linux kernel has messed this up, even back in 4.x days.
>
>If you want to make any progress, you'll have to share a test case.
It's a proprietary guest, so I need to strip it down first. This may take some time. Thanks for yor feedbak so far!
Best regards,
Bernhard
>
>
>r~
next prev parent reply other threads:[~2024-05-27 17:49 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-05 13:52 [PULL 00/20] target-arm queue Peter Maydell
2024-03-05 13:52 ` [PULL 01/20] hw/i2c: Implement Broadcom Serial Controller (BSC) Peter Maydell
2024-03-05 13:52 ` [PULL 02/20] hw/arm: Connect BSC to BCM2835 board as I2C0, I2C1 and I2C2 Peter Maydell
2024-03-05 13:52 ` [PULL 03/20] tests/qtest: Add testcase for BCM2835 BSC Peter Maydell
2024-03-05 13:52 ` [PULL 04/20] hw/char/pl011: Add support for loopback Peter Maydell
2024-03-05 13:52 ` [PULL 05/20] hw/misc/stm32l4x5_rcc: Implement STM32L4x5_RCC skeleton Peter Maydell
2024-03-05 13:52 ` [PULL 06/20] hw/misc/stm32l4x5_rcc: Add an internal clock multiplexer object Peter Maydell
2024-03-05 13:52 ` [PULL 07/20] hw/misc/stm32l4x5_rcc: Add an internal PLL Clock object Peter Maydell
2024-03-05 13:52 ` [PULL 08/20] hw/misc/stm32l4x5_rcc: Initialize PLLs and clock multiplexers Peter Maydell
2024-03-05 13:52 ` [PULL 09/20] hw/misc/stm32l4x5_rcc: Handle Register Updates Peter Maydell
2024-03-05 13:52 ` [PULL 10/20] hw/misc/stm32l4x5_rcc: Add write protections to CR register Peter Maydell
2024-03-05 13:52 ` [PULL 11/20] hw/arm/stm32l4x5_soc.c: Use the RCC Sysclk Peter Maydell
2024-03-05 13:52 ` [PULL 12/20] tests/qtest/stm32l4x5_rcc-test.c: Add tests for the STM32L4x5_RCC Peter Maydell
2024-03-05 13:52 ` [PULL 13/20] target/arm: Support 32-byte alignment in pow2_align Peter Maydell
2024-03-05 13:52 ` [PULL 14/20] exec/memattrs: Remove target_tlb_bit* Peter Maydell
2024-03-05 13:52 ` [PULL 15/20] accel/tcg: Add tlb_fill_flags to CPUTLBEntryFull Peter Maydell
2024-03-05 13:52 ` [PULL 16/20] accel/tcg: Add TLB_CHECK_ALIGNED Peter Maydell
2024-03-05 13:52 ` [PULL 17/20] target/arm: Do memory type alignment check when translation disabled Peter Maydell
2024-05-25 13:41 ` Bernhard Beschow
2024-05-25 20:50 ` Bernhard Beschow
2024-05-27 2:36 ` Richard Henderson
2024-05-27 10:58 ` Peter Maydell
2024-05-27 15:29 ` Bernhard Beschow
2024-05-27 16:20 ` Richard Henderson
2024-05-27 17:49 ` Bernhard Beschow [this message]
2024-07-05 11:46 ` Bernhard Beschow
2024-07-05 17:08 ` Peter Maydell
2024-08-09 16:07 ` Peter Maydell
2024-08-28 7:22 ` Michael Tokarev
2024-08-28 11:07 ` Richard Henderson
2024-08-28 11:27 ` Michael Tokarev
2024-08-28 15:51 ` Peter Maydell
2024-08-29 17:25 ` Peter Maydell
2024-03-05 13:52 ` [PULL 18/20] target/arm: Do memory type alignment check when translation enabled Peter Maydell
2024-03-05 13:52 ` [PULL 19/20] atomic.h: Reword confusing comment for qatomic_cmpxchg Peter Maydell
2024-03-05 13:52 ` [PULL 20/20] qemu-options.hx: Don't claim "-serial" has limit of 4 serial ports Peter Maydell
2024-03-05 15:26 ` [PULL 00/20] target-arm queue Peter Maydell
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