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[174.21.81.121]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-20c1398ee06sm4517555ad.288.2024.10.04.18.39.06 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 04 Oct 2024 18:39:07 -0700 (PDT) Message-ID: <5a1606e1-649f-4bda-83e9-aff8c9dfd9f4@linaro.org> Date: Fri, 4 Oct 2024 18:39:05 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 00/25] misc: Use explicit endian LD/ST API To: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, qemu-s390x@nongnu.org, Thomas Huth , Pierrick Bouvier , qemu-ppc@nongnu.org, Alistair Francis References: <20241004163042.85922-1-philmd@linaro.org> Content-Language: en-US From: Richard Henderson In-Reply-To: <20241004163042.85922-1-philmd@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::1035; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1035.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 10/4/24 09:30, Philippe Mathieu-Daudé wrote: > Philippe Mathieu-Daudé (25): > gdbstub/helpers: Have ldtul_p() definition use ldn_p() > target/hexagon: Replace ldtul_p() -> ldl_p() > target/alpha: Replace ldtul_p() -> ldq_p() > target/s390x: Replace ldtul_p() -> ldq_p() > gdbstub/helpers: Introduce ldtul_$endian_p() helpers > target/alpha: Use explicit little-endian LD/ST API > target/hexagon: Use explicit little-endian LD/ST API > hw/i386: Use explicit little-endian LD/ST API > target/i386: Use explicit little-endian LD/ST API > target/avr: Use explicit little-endian LD/ST API > linux-user/i386: Use explicit little-endian LD/ST API > target/loongarch: Use explicit little-endian LD/ST API > target/sh4: Use explicit little-endian LD/ST API > target/tricore: Use explicit little-endian LD/ST API > target/rx: Use explicit little-endian LD/ST API > target/riscv: Use explicit little-endian LD/ST API > hw/m68k: Use explicit big-endian LD/ST API > target/m68k: Use explicit big-endian LD/ST API > hw/sparc: Use explicit big-endian LD/ST API > target/sparc: Use explicit big-endian LD/ST API > target/hppa: Use explicit big-endian LD/ST API > hw/s390x: Use explicit big-endian LD/ST API > target/s390x: Use explicit big-endian LD/ST API > target/openrisc: Use explicit big-endian LD/ST API > hw/ppc/e500: Use explicit big-endian LD/ST API The sh4, rx, and riscv targets *can* support multiple endianness. While we removed sh4eb for system mode, we still support sh4eb-linux-user, and therefore the target/sh4 patch affecting gdbstub is wrong. RX sets endianness via a pin sampled at reset; if we ever implement this, it would be via a property on the cpu. RISCV sets endianness via a couple of bits in MSTATUS; system mode would always use little-endian, but riscv64eb-user isn't out of the question. While we have never supported rx or riscv in big-endian, but there's no reason that we can't, and those target/ patches make things harder. Since target/ will *always* have TARGET_BIG_ENDIAN available, I don't see that we're saving anything there. r~