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([2a01:e0a:59e:9d80:527b:9dff:feef:3874]) by smtp.gmail.com with ESMTPSA id m13-20020a5d56cd000000b0030647449730sm1560722wrw.74.2023.11.03.03.56.58 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 03 Nov 2023 03:56:59 -0700 (PDT) Message-ID: <5a481c02-d9ef-4c46-bee1-f17dbd387545@redhat.com> Date: Fri, 3 Nov 2023 11:56:57 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: Any plans to implement more ARM SMMUv3 features? Content-Language: en-US To: =?UTF-8?Q?Alex_Benn=C3=A9e?= , Mostafa Saleh , Jean-Philippe Brucker , Jason Wang , Kunkun Jiang , Zenghui Yu , Simon Veith Cc: qemu-arm@nongnu.org, Peter Maydell , QEMU Developers , =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= , Joe Komlodi , Prem Mallappa , Leonardo Garcia , Richard Henderson , Alistair Francis , Nicolin Chen References: <87il6n0zlw.fsf@draig.linaro.org> From: Eric Auger In-Reply-To: <87il6n0zlw.fsf@draig.linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.393, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: eric.auger@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi Alex, On 10/31/23 13:02, Alex Bennée wrote: > Hi All, > > Since 8.1 we enabled the FEAT_RME CPU feature to allow for Arm CCA > guests to be run under QEMU's Arm emulation. While this is enough for > pure software guests eventually we would want to support modelling > systems with "real" hardware. One part of that is updating the SMMU > emulation to make it RME aware. > > The recently published F.a spec is available on the Arm site: > > https://developer.arm.com/documentation/ihi0070/latest/ > > As we have a keen interest on tracking (and implementing!) Arm features > we have coded up the various sub-features as stories under an EPIC for > each level of SMMU feature on our public JIRA: > > https://linaro.atlassian.net/browse/QEMU-533 (SMMUv3.0) > https://linaro.atlassian.net/browse/QEMU-553 (SMMUv3.1) > https://linaro.atlassian.net/browse/QEMU-558 (SMMUv3.2) > https://linaro.atlassian.net/browse/QEMU-566 (SMMUv3.3) > > I think the state of the cards currently represents what has been > implemented and what is left to do. As you can see it adds up to a fair > bit of stuff. As a lot of people have been hacking on the SMMU code over > the last few years I thought it would be useful to reach out and see who > else is interested in further enhancing the SMMU emulation support? > > If anyone has any patches/branches cooking or is intending to implement > any particular bits please do let me know and I can update the cards to > reflect the current state of work. As ever we will do our best to help > review and smooth the up-streaming process for all Arm related feature > enhancements. At the moment I have no plan to work on any of those features besides following "Nested Translation Support for SMMUv3" works ([PATCH v2 00/17] Add Nested Translation Support for SMMUv3 ). Adding Nicolin in CC by the way. However I will take some cycles to review patches when they come. Thanks Eric > > Thanks, >